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| 型号： | ICS841003AKI-02T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 625 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC32 |
| 封装： | 5 X 5 MM, 0.75 MM HEIGHT, VFQFN-32 |
| 文件页数： | 3/17页 |
| 文件大小： | 343K |
| 代理商： | ICS841003AKI-02T |
IDT / ICS 0.7V DIFF/LVDS FREQUENCY SYNTHESIZER
11
ICS841003AKI-02 REV. A MARCH 19, 2007
ICS841003I-02
FEMTOCLOCKS CRYSTAL-TO-0.7V DIFF/LVDS FREQUENCY SYNTHESIZER
PRELIMINARY
INPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k
Ω resistor can be tied
from XTAL_IN to ground.
REF_CLK INPUT:
For applications not requiring the use of the reference clock, it
can be left floating. Though not required, but for additional
protection, a 1k
Ω resistor can be tied from the REF_CLK to
ground.
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVDS OUTPUT
All unused LVDS output pairs can be either left floating or
terminated with 100
Ω across. If they are left floating, there should
be no trace attached.
DIFFERENTIAL OUTPUT
All unused differential outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram is
shown in Figure 4. The XTAL_OUT pin can be left floating. The
input edge rate can be as slow as 10ns. For LVCMOS inputs, it is
recommended that the amplitude be reduced from full swing to
half swing in order to prevent signal interference with the power
rail and to reduce noise. This configuration requires that the output
FIGURE 4. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
impedance of the driver (Ro) plus the series resistance (Rs) equals
the transmission line impedance. In addition, matched termination
at the crystal input will attenuate the signal in half. This can be
done in one of two ways. First, R1 and R2 in parallel should equal
the transmission line impedance. For most 50
Ω applications, R1
and R2 can be 100
Ω. This can also be accomplished by removing
R1 and making R2 50
Ω.
R2
Zo = 50
VDD
Ro
Zo = Ro + Rs
R1
VDD
XTAL_IN
XTAL_OUT
.1uf
Rs
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