参数资料
型号: ICS8421002AGIT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 226.66 MHz, OTHER CLOCK GENERATOR, PDSO20
封装: 6.50 X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20
文件页数: 2/15页
文件大小: 1085K
代理商: ICS8421002AGIT
IDT / ICS HSTL FREQUENCY SYNTHESIZER
10
ICS8421002I REV B AUGUST 7, 2006
ICS8421002I
FEMTOCLOCKS CRYSTAL-TO-HSTL FREQUENCY SYNTHESIZER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
HSTL output driver circuit and termination are shown in
Figure 3.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
load.
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = (V
OH_MAX
/R
L
) * (V
DD_MAX
- V
OH_MAX
)
Pd_L = (V
OL_MAX
/R
L
) * (V
DD_MAX
- V
OL_MAX
)
Pd_H = (1V/50
) * (2V - 1V) = 20mW
Pd_L = (0.4V/50
) * (2V - 0.4V) = 12.8mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 32.8mW
FIGURE 3. HSTL DRIVER CIRCUIT AND TERMINATION
V
DDO
V
OUT
RL
50
Q1
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