参数资料
型号: ICS843023AGLF
厂商: IDT, Integrated Device Technology Inc
文件页数: 13/14页
文件大小: 0K
描述: IC CLK GENERATOR LVPECL 8-TSSOP
标准包装: 96
系列: HiPerClockS™, FemtoClock™
类型: 时钟/频率合成器,时钟发生器
PLL:
输入: 晶体
输出: LVPECL
电路数: 1
比率 - 输入:输出: 1:1
差分 - 输入:输出: 无/是
频率 - 最大: 320MHz
除法器/乘法器: 是/无
电源电压: 3.135 V ~ 3.465 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 8-TSSOP
包装: 管件
其它名称: 843023AGLF
IDT / ICS 3.3V LVPECL CLOCK GENERATOR
8
ICS843023AG REV. A OCTOBER 23, 2008
ICS843023
FEMTOCLOCKS CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843023.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843023 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
CC_MAX
* I
EE_MAX
= 3.465V * 75mA = 259.87mW
Power (outputs)
MAX
= 30mW/Loaded Output pair
Total Power
_MAX
(3.465V, with all outputs switching) = 259.87mW + 30mW = 289.87mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.290W * 90.5°C/W = 96.2°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE
θθθθθ
JA
FOR
8-PIN TSSOP, FORCED CONVECTION
θθθθθ
JA
by Velocity (Meters per Second)
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
89.8°C/W
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