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参数资料
| 型号： | ICS84314AY-02LF |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32 |
| 文件页数： | 10/17页 |
| 文件大小： | 856K |
| 代理商： | ICS84314AY-02LF |
84314AY-02
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 17, 2005
2
Integrated
Circuit
Systems, Inc.
ICS84314-02
700MHZ, CRYSTAL-TO-3.3V/2.5V LVPECL
FREQUENCY SYNTHESIZER W/FANOUT BUFFER
PRELIMINARY
nP_LOAD input is initially LOW. The data on inputs M0 through
M8 is passed directly to the M divider. On the LOW-to-HIGH tran-
sition of the nP_LOAD input, the data is latched and the M divider
remains loaded until the next LOW transition on nP_LOAD or until
a serial event occurs. As a result, the M bits can be hardwired to
set the M divider to a specific default state that will automatically
occur during power-up. In parallel mode, the N output divider is
set to 2. In serial mode, the N output divider can be set for either
÷1, ÷2, ÷4 or ÷8. The relationship between the VCO frequency,
the crystal frequency and the M divider is defined as follows:
The M value and the required values of M0 through M8 are shown
in Table 3B, Programmable VCO Frequency Function Table. Valid
M values for which the PLL will achieve lock for a 16MHz refer-
ence are defined as 125
≤ M ≤ 350. The frequency out
is defined as follows:
Serial operation occurs when nP_LOAD is HIGH and S_LOAD
is LOW. The shift register is loaded by sampling the S_DATA bits
with the rising edge of S_CLOCK. The contents of the shift regis-
ter are loaded into the M divider and N output divider when
S_LOAD transitions from LOW-to-HIGH. The M divide and N out-
put divide values are latched on the HIGH-to-LOW transition of
S_LOAD. If S_LOAD is held HIGH, data at the S_DATA input is
passed directly to the M divider and N output divider on each
rising edge of S_CLOCK.
NOTE: The functional description that follows describes
operation using a 16MHz crystal. Valid PLL loop divider
values for different crystal or input frequencies are defined
in the Input Frequency Characteristics, Table 5, NOTE 1.
The ICS84314-02 features a fully integrated PLL and there-
fore requires no external components for setting the loop
bandwidth. A parallel-resonant, fundamental crystal is used
as the input to the on-chip oscillator. The output of the os-
cillator is divided by 16 prior to the phase detector. With a
16MHz crystal, this provides a 1MHz reference frequency.
The VCO of the PLL operates over a range of 250MHz to
700MHz. The output of the M divider is also applied to the
phase detector.
The phase detector and the M divider force the VCO output
frequency to be 2M times the reference frequency by ad-
justing the VCO control voltage. Note that for some values
of M (either too high or too low), the PLL will not achieve
lock. The output of the VCO is scaled by a divider prior to
being sent to each of the LVPECL output buffers. The divider
provides a 50% output duty cycle.
The programmable features of the ICS84314-02 support
two input modes to program the M divider. The two input
operational modes are parallel and serial. Figure 1 shows
the timing diagram for each mode. In parallel mode, the
FUNCTIONAL DESCRIPTION
16
fVCO =
fxtal x 2M
FIGURE 1. PARALLEL & SERIAL LOAD OPERATIONS
S_CLOCK
S_DATA
S_LOAD
nP_LOAD
M0:M8
nP_LOAD
S_LOAD
Time
SERIAL LOADING
PARALLEL LOADING
t
S
t
H
t
S
t
H
t
S
M, N
*NULL *NULL SSC0 **N1
**N0
M8
M7
M6
M5
M4
M3
M2
M1
M0
*NOTE: The NULL timing slot must be observed.
**NOTE: “N” can only be controlled through serial loading.
fout = fVCO
=
16
2M
fxtal x
N
1
x
N
1
x
e
u
l
a
V
c
i
g
o
L
1
Ne
u
l
a
V
c
i
g
o
L
0
Ne
d
i
v
i
D
t
u
p
t
u
O
N
00
÷1
01
÷
)
t
l
u
a
f
e
D
p
u
-
r
e
w
o
P
(
2
10
÷4
11
÷8
TABLE 1A. N OUTPUT DIVIDER FUNCTION TABLE (SERIAL LOAD)
0
C
S
Se
t
a
t
S
C
S
0)
t
l
u
a
f
e
D
p
u
-
r
e
w
o
P
(
f
O
1D
B
T
TABLE 1B. SSC FUNCTION TABLE
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS84314AY-02LFT | 功能描述:IC SYNTHESIZER 700MHZ 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS84314AY-02T | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ, CRYSTAL-TO-3.3V/2.5V LVPECL FREQUENCY SYNTHESIZER W/FANOUT BUFFER |
| ICS84314AYLF | 功能描述:IC SYNTHESIZER 350MHZ 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS84314AYLFT | 功能描述:IC SYNTHESIZER 350MHZ 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS84314AYT | 制造商:ICS 制造商全称:ICS 功能描述:350MHZ, CRYSTAL-TO-3.3V/2.5V LVPECL FREQUENCY SYNTHESIZER W/FANOUT BUFFER |
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