参数资料
型号: ICS843253AGI-45LF
厂商: IDT, Integrated Device Technology Inc
文件页数: 13/15页
文件大小: 0K
描述: IC SYNTHESIZER LVPECL 16-TSSOP
标准包装: 96
系列: HiPerClockS™, FemtoClock™
类型: 频率合成器
PLL: 带旁路
输入: 晶体
输出: LVCMOS,LVPECL,LVTTL
电路数: 1
比率 - 输入:输出: 1:3
差分 - 输入:输出: 无/是
频率 - 最大: 156.25MHz
除法器/乘法器: 是/无
电源电压: 3.135 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
其它名称: 843253AGI-45LF
ICS843253I-45
FEMTOCLOCK CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS843253AGI-45 REVISION A JULY 20, 2009
7
2009 Integrated Device Technology, Inc.
Application Information
Recommendations for Unused Input Pins
Inputs:
LVCMOS Control Pins
All control pins have internal pull-ups; additional resistance is not
required but can be added for additional protection. A 1k
resistor
can be used.
Outputs:
LVPECL Outputs
All unused LVPECL outputs can be left floating. We recommend that
there is no trace attached. Both sides of the differential output pair
should either be left floating or terminated.
LVCMOS Output
The unused LVCMOS output can be left floating. There should be no
trace attached.
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perform- ance,
power supply isolation is required. The ICS843253I-45 provides
separate power supplies to isolate any high switching noise from the
outputs to the internal PLL. VCC, VCCA, VCCOA and VCCOB should be
individually connected to the power supply plane through vias, and
0.01F bypass capacitors should be used for each pin. Figure 1
illustrates this for a generic VCC pin and also shows that VCCA
requires that an additional 10
resistor along with a 10F bypass
capacitor be connected to the VCCA pin.
Figure 1. Power Supply Filtering
Crystal Input Interface
The ICS843253I-45 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in Figure
2 below were determined using a 25MHz, 18pF parallel resonant
crystal and were chosen to minimize the ppm error. The optimum C1
and C2 values can be slightly adjusted for different board layouts.
Figure 2. Crystal Input Interface
VCC
VCCA
3.3V
10
10F
.01F
XTAL_IN
XTAL_OUT
X1
18pF Parallel Crystal
C1
27p
C2
27p
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