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参数资料
| 型号： | ICS8432DYI-101LFT |
| 元件分类： | 时钟及定时 |
| 英文描述： | 8432 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026, LQFP-32 |
| 文件页数： | 1/18页 |
| 文件大小： | 173K |
| 代理商： | ICS8432DYI-101LFT |
8432DYI-101
www.icst.com/products/hiperclocks.html
REV. A MAY 23, 2005
1
Integrated
Circuit
Systems, Inc.
ICS8432I-101
700MHZ,
DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS8432I-101 is a general purpose, dual out-
put Differential-to-3.3V LVPECL high frequency
synthesizer and a member of the HiPerClockS
family of High Performance Clock Solutions from
ICS. The ICS8432I-101 has a selectable
TEST_CLK or CLK, nCLK inputs.The TEST_CLK input accepts
LVCMOS or LVTTL input levels and translates them to 3.3V
LVPECL levels. The CLK, nCLK pair can accept most standard
differential input levels. The VCO operates at a frequency range
of 250MHz to 700MHz. The VCO frequency is programmed in
steps equal to the value of the input differential or single ended
reference frequency. The VCO and output frequency can be
programmed using the serial or parallel interfaces to the
configuration logic. The low phase noise characteristics of the
ICS8432I-101 makes it an ideal clock source for Gigabit
Ethernet and SONET applications.
BLOCK DIAGRAM
PIN ASSIGNMENT
FEATURES
Dual differential 3.3V LVPECL outputs
Selectable CLK, nCLK or LVCMOS/LVTTL TEST_CLK
TEST_CLK can accept the following input levels:
LVCMOS or LVTTL
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
CLK, nCLK orTEST_CLK maximum input frequency: 40MHz
Output frequency range: 25MHz to 700MHz
VCO range: 250MHz to 700MHz
Accepts any single-ended input signal on CLK input
with resistor bias on nCLK input
Parallel interface for programming counter
and output dividers
RMS period jitter: 5ps (maximum)
Cycle-to-cycle jitter: 25ps (maximum)
3.3V supply voltage
-40°C to 85°C ambient operating temperature
Lead-Free package fully RoHS compliant
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
CLK
TEST_CLK
CLK_SEL
VCCA
S_LOAD
S_DATA
S_CLOCK
MR
M5
M6
M7
M8
N0
N1
nc
VEE
V
EE
nFOUT0
FOUT0
V
CCO
nFOUT1
FOUT1
V
CC
TEST
nCLK
nP_LOAD
VCO_SEL
M0
M1
M2
M3
M4
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
ICS8432I-101
VCO_SEL
CLK_SEL
TEST_CLK
CLK
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
N0:N1
VCO
PLL
FOUT0
nFOUT0
FOUT1
nFOUT1
TEST
CONFIGURATION
INTERFACE
LOGIC
÷ M
0
1
0
1
PHASE DETECTOR
÷1
÷2
÷4
÷8
MR
nCLK
HiPerClockS
ICS
相关PDF资料 |
PDF描述 |
|---|---|
| ICS8432DYI-101LF | 8432 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS8432DYI-101T | 8432 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS84330AM-01 | 700 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS84330AM-01LF | 700 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS84330AVLF | 700 MHz, OTHER CLOCK GENERATOR, PQCC28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS8432DYI-101T | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8432I-101 | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8432I-51 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:700MHZ, CYRSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS84330 | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS84330-01 | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
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