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参数资料
| 型号： | ICS8442AYLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封装： | 7 X 7 MM, 1.4 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32 |
| 文件页数： | 16/16页 |
| 文件大小： | 399K |
| 代理商： | ICS8442AYLFT |
8442AY
www.icst.com/products/hiperclocks.html
REV. D MAY 10, 2005
9
Integrated
Circuit
Systems, Inc.
ICS8442
700MHZ, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL
LVDS FREQUENCY SYNTHESIZER
CRYSTAL INPUT INTERFACE
A crystal can be characterized for either series or parallel mode
operation. The ICS8442 has a built-in crystal oscillator circuit.
This interface can accept either a series or parallel crystal without
additional components and generate frequencies with accuracy
Figure 3. CRYSTAL INPUt INTERFACE
suitable for most applications. Additional accuracy can be
achieved by adding two small capacitors C1 and C2 as shown in
Figure 3. Typical results using parallel 18pF crystals are shown
in Table 10.
LVDS DRIVER TERMINATION
A general LVDS interface is shown in
Figure 4. In a 100
Ω differ-
ential transmission line environment, LVDS drivers require a
matched load termination of 100
Ω across near the receiver in-
put. For a multiple LVDS outputs buffer, if only partial outputs
are used, it is recommended to terminate the un-used outputs.
100
Ω
Ω Differential Transmission Line
FIGURE 4. TYPICAL LVDS DRIVER TERMINATION
DIFFERENTIAL DUTY CYCLE IMPROVEMENT
The schematic below is recommended for applications using the
÷1 output configuration for improving the differential duty cycle.
FIGURE 5. DIFFERENTIAL DUTY CYCLE IMPROVEMENT
3.3V
LVDS_DRIVER
R1
100
HiPerClockS
Zo = 50 Ohm
nCLK
CLK
R1
100
C1
.1uf
Vcc = 3.3V
R3
800
LVDS Driv er
R2
1.3k
Zo = 50
R4
1.3k
C2
.1uf
Receiv er_dif
+
-
Zo = 50
R5
800
C1
18p
X1
18pF Parallel Crystal
C2
22p
XTAL_IN
XTAL_OUT
ICS8442
700MHZ, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER
TSD
IDT / ICS 700MHZ, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER
ICS8442
9
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS844441AGILF | 功能描述:IC GENERATR CLK SAS/SATA 16TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:HiPerClockS™, FemtoClock™ 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| ICS844441AGILFT | 功能描述:IC GENERATR CLK SAS/SATA 16TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:HiPerClockS™, FemtoClock™ 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| ICS844441BGILF | 功能描述:IC GENERATR CLK SAS/SATA 16TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:HiPerClockS™, FemtoClock™ 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| ICS844441BGILFT | 功能描述:IC GENERATR CLK SAS/SATA 16TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:HiPerClockS™, FemtoClock™ 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| ICS844441BMI-150 | 制造商:Integrated Device Technology Inc 功能描述:IC GENERATR CLK SAS/SATA 8SOIC |
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