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| 型号： | ICS8745BM-21LFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 8745 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封装： | 7.50 X 12.80 MM, 2.30 MM HEIGHT, ROHS COMPLIANT, MS-013, MO-119, SOIC-20 |
| 文件页数： | 17/19页 |
| 文件大小： | 840K |
| 代理商： | ICS8745BM-21LFT |
ICS8745B-21
1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
IDT / ICS LVDS ZERO DELAY CLOCK GENERATOR
7
ICS8745BM-21REV. C APRIL 17, 2007
AC Electrical Characteristics
Table 6. AC Characteristics, VDD = VDDA = VDDO = 3.3V ± 5%, TA = 0°C to 70°C
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as the time difference between the input reference clock and the averaged feedback input signal across all conditions,
when the PLL is locked and the input reference frequency is stable.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
cross points.
NOTE 4: Phase jitter is dependent on the input source used.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 6: Characterized at VCO frequency of 622MHz.
NOTE 7: Measured from the 20% to 80% points. Guaranteed by characterization. Not production tested.
Parameter
Symbol
Test Conditions
Minimum
Typical
Maximum
Units
fMAX
Output Frequency
700
MHz
tPD
Propagation Delay; NOTE 1
PLL_SEL = 0V, f ≤ 700MHz
3.1
3.4
4.0
ns
tsk()
Static Phase Offset; NOTE 2, 5
PLL_SEL = 3.3V
-100
25
150
ps
tsk(o)
Output Skew; NOTE 3, 5
35
ps
tjit(cc)
Cycle-to-Cycle Jitter; NOTE 5, 6
30
ps
tjit(θ)
Phase Jitter; NOTE 4, 5, 6
±52
ps
tL
PLL Lock Time
1ms
tR / tF
Output Rise/Fall Time; NOTE 7
20% to 80%
200
700
ps
odc
Output Duty Cycle
46
50
54
%
相关PDF资料 |
PDF描述 |
|---|---|
| ICS8745BM-21LF | 8745 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| ICS8745BM-21T | 8745 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| ICS8745BMI-21LF | 8745 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| ICS8745BMI-21 | 8745 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| ICS8745BMI-21LF | PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
相关代理商/技术参数 |
参数描述 |
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| ICS8745BMI-21LF | 功能描述:IC CLK GEN 1:1 DIFF-LVDS 20-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| ICS8745BMI-21LFT | 功能描述:IC CLK GEN 1:1 DIFF-LVDS 20-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
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| ICS8745BYI | 制造商:Integrated Device Technology Inc 功能描述: |
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