参数资料
型号: ICS8745BMI-21
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 8745 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封装: 7.50 X 12.80 MM, 2.30 MM HEIGHT, MS-013, MO-119, SOIC-20
文件页数: 16/19页
文件大小: 321K
代理商: ICS8745BMI-21
ICS8745BI-21
1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
IDT / ICS LVDS ZERO DELAY CLOCK GENERATOR
6
ICS8745BMI-21
REV. C APRIL 17, 2007
Table 4C. Differential DC Characteristics, VDD = VDDA = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
NOTE 1: Common mode input voltage is defined as VIH.
NOTE 2: For single-ended applications, the maximum input voltage for CLK, CLK is VDD + 0.3V.
Table 4D. LVDS DC Characteristics, VDD = VDDA = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Table 5. Input Frequency Characteristics, VDD = VDDA = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
IIH
Input High Current
CLK, FB_IN
VDD = VIN = 3.465V
150
A
CLK, FB_IN
VDD = VIN = 3.465V
5
A
IIL
Input Low Current
CLK, FB_IN
VDD = 3.465V,
VIN = 0V
-5
A
CLK, FB_IN
VDD = 3.465V,
VIN = 0V
-150
A
VPP
Peak-to-Peak Voltage
0.15
1.3
V
VCMR
Common Mode Input Voltage; NOTE 1, 2
GND + 0.5
VDD – 0.85
V
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VOD
Differential Output Voltage
320
440
550
mV
V
OD
VOD Magnitude Change
0
50
mV
VOS
Offset Voltage
1.05
1.2
1.35
V
OS
VOS Magnitude Change
25
mV
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
FIN
Input Frequency
CLK, CLK
PLL_SEL = 1
31.25
700
A
PLL_SEL = 0
700
V
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