参数资料
型号: ICS889474AKLFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 889474 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC24
封装: 4 X 4 MM, 0.90 MM HEIGHT, ROHS COMPLIANT, MO-220, VFQFN-24
文件页数: 13/14页
文件大小: 295K
代理商: ICS889474AKLFT
IDT / ICS LVDS MULTIPLEXER
8
ICS889474AK REV. A MARCH 7, 2007
ICS889474
2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION
PRELIMINARY
APPLICATION INFORMATION
LVPECL INPUT WITH BUILT-IN 50
Ω
Ω TERMINATIONS INTERFACE
The IN /nIN with built-in 50
Ω terminations accepts LVDS, LVPECL,
CML and other differential signals. The signal must meet the V
PP
and V
CMR
input requirements. Figures 1A to 1D show interface
examples for the HiPerClockS IN/nIN input with built-in 50
Ω
terminations driven by the most common driver types. The input
interfaces suggested here are examples only. If the driver is from
another vendor, use their termination recommendation. Please
consult with the vendor of the driver component to confirm the
driver termination requirements.
FIGURE 1A. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50
Ω
Ω DRIVEN BY AN LVDS DRIVER
FIGURE 1B. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50
Ω
Ω DRIVEN BY AN LVPECL DRIVER
IN
nIN
VT
2.5V
LVDS
3.3V or 2.5V
Zo = 50 Ohm
Receiver
With
Built-In
50 Ohm
Zo = 50 Ohm
Receiver
With
Built-In
50 Ohm
Zo = 50 Ohm
IN
nIN
VT
2.5V
R1
18
2.5V LVPECL
FIGURE 1E. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50
Ω
Ω DRIVEN BY AN SSTL DRIVER
FIGURE 2C. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50
Ω
Ω DRIVEN BY AN OPEN COLLECTOR
CML DRIVER
FIGURE 1D. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50
Ω
Ω DRIVEN BY A CML DRIVER
WITH
BUILT-IN 50
Ω
Ω PULLUP
Zo = 50 Ohm
2.5V
Zo = 50 Ohm
IN
nIN
VT
Receiver
With
Built-In
50 Ohm
2.5V
CML - Open Collector
IN
nIN
VT
Receiver
With
Built-In
50 Ohm
2.5V
Zo = 50 Ohm
CML - Built-in 50 Ohm Pull-up
2.5V
SSTL
R1
25
R2
25
IN
VT
nIN
Receiver With Built-In 50
Ω
Zo = 50 Ohm
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