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参数资料
| 型号： | ICS889872AK |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION |
| 中文描述： | 889872 SERIES, LOW SKEW CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 |
| 封装： | 3 X 3 MM, 0.95 MM HEIGHT, MO-220VEED-2/-4, VFQFN-16 |
| 文件页数： | 8/14页 |
| 文件大小： | 649K |
| 代理商： | ICS889872AK |
ICS889872
DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION
PRELIMINARY
IDT / ICS
LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION
8
ICS889872AK REV. A AUGUST 22, 2007
Differential Input with Built-in 50
Termination Interface
The IN /nIN with built-in 50
terminations accepts LVDS, LVPECL,
LVHSTL, CML, SSTL and other differential signals. Both signals
must meet the V
PP
and V
CMR
input requirements.
Figures 3A to 3E
show interface examples for the HiPerClockS IN/nIN input with
built-in 50
terminations driven by the most common driver types.
The input interfaces suggested here are examples only. If the driver
is from another vendor, use their termination recommendation.
Please consult with the vendor of the driver component to confirm
the driver termination requirements.
Figure 3A. HiPerClockS IN/nIN Input with Built-In 50
Driven by an LVDS Driver
Figure 3C. HiPerClockS IN/nIN Input with Built-In 50
Driven by a CML Driver with Built-In 50
Pullup
Figure 3E. HiPerClockS IN/nIN Input with Built-In 50
Driven by a 3.3V CML Driver with
Built-In Pullup
Figure 3B. HiPerClockS IN/nIN Input with Built-In 50
Driven by an LVPECL Driver
Figure 3D. HiPerClockS IN/nIN Input with Built-In 50
Driven by an SSTL Driver
IN
nIN
VT
Receiver
With
Built-In
50
LVDS
3.3V or 2.5V
2.5V
Zo = 50
Zo = 50
CML - Built-in 50
Pull-up
IN
nIN
VT
Receiver
With
Built-In
50
2.5V
2.5V
Zo = 50
Zo = 50
C1
C2
VT
REF_AC
50
50
3.3V CML with
Built-In Pullup
3.3V
IN
nIN
2.5V
Receiver with
Built-In 50
Zo = 50
Zo = 50
IN
nIN
VT
Receiver
With
Built-In
50
R1
18
LVPECL
2.5V
2.5V
Zo = 50
Zo = 50
C1
C2
VT
REF_AC
50
50
3.3V LVPECL
R5
100 - 200
R5
1
00 - 200
3.3V
IN
nIN
2.5V
Receiver with
Built-In 50
Zo = 50
Zo = 50
相关PDF资料 |
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| ICS889872AKLF | DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION |
| ICS889872AKLFT | DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION |
| ICS889872AKT | DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION |
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| ICS889872AKLF | 功能描述:IC CLK BUFFER DVDR 1:3 16-VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
| ICS889872AKLFT | 功能描述:IC CLK BUFFER DVDR 1:3 16-VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
| ICS889874AKLF | 功能描述:IC CLK BUF DVDR MUX 1:2 16VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
| ICS889874AKLFT | 功能描述:IC CLK BUF DVDR MUX 1:2 16VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
| ICS889875AKLF | 功能描述:IC CLK BUF DVDR MUX 1:2 16VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:1 系列:HiPerClockS™ 类型:扇出缓冲器（分配），多路复用器 电路数:1 比率 - 输入:输出:2:18 差分 - 输入:输出:是/无 输入:CML，LVCMOS，LVPECL，LVTTL，SSTL 输出:LVCMOS，LVTTL 频率 - 最大:250MHz 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:- 其它名称:800-1923-6 |
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