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参数资料
| 型号： | ICS9148F-03 |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 83.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, SSOP-48 |
| 文件页数： | 7/12页 |
| 文件大小： | 539K |
| 代理商： | ICS9148F-03 |
4
ICS9148-03
CPU_STOP# Timing Diagram
CPU_STOP# is an asychronous input to the clock synthesizer. It is used to turn off the CPU clocks for low power
operation. CPU_STOP# is synchronized by the ICS9148-03. The minimum that the CPU clock is enabled (CPU_STOP#
high pulse) is 100 CPU clocks. All other clocks will continue to run while the CPU clocks are disabled. The CPU clocks
will always be stopped in a low state and start in such a manner that guarantees the high pulse width is a full pulse. CPU
clock on latency is less than 4 CPU clocks and CPU clock off latency is less than 4 CPU clocks.
Notes:
1. All timing is referenced to the internal CPU clock.
2. CPU_STOP# is an asynchronous input and metastable conditions may exist. This signal
is synchronized to the CPU clocks inside the ICS9148-03.
3. All other clocks continue to run undisturbed.
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PDF描述 |
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| ICS9148F-08 | 83.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148F-11 | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148F-14LF | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148F-14 | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148F-14LF | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9148F05 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Interface IC |
| ICS9148F06 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Interface IC |
| ICS9148F-08 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CPU System Clock Generator |
| ICS9148F-10 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CPU System Clock Generator |
| ICS9148F-11 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUMTM |
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