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参数资料
| 型号： | ICS9148F-25 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 83.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, SSOP-48 |
| 文件页数： | 1/13页 |
| 文件大小： | 537K |
| 代理商： | ICS9148F-25 |
Integrated
Circuit
Systems, Inc.
General Description
Features
ICS9148-25
Block Diagram
Pentium/ProTM System and Cyrix Clock Chip
9148-25Rev B 5/20/99
Pin Configuration
48-Pin SSOP
Pentium is a trademark on Intel Corporation.
Generates system clocks for CPU, IOAPIC, SDRAM,
PCI, plus 14.318 MHz ), USB, Plus Super I/O
Spread spectrum for CPU/SDRAM/PCI clocks default
Supports single or dual processor systems
Modulation of Spread Spectrum selectable as ±0.5, ±1.0,
±2.0 or none
Supports Intel 60, 66.8MHz, Cyrix 55, 75MHz plus 83.3
and 68MHz (Turbo of 66.6) speeds.
Synchronous clocks skew matched to 250ps window on
CPU, SDRAM and 500ps window on PCI clocks
CPU clocks to PCI clocks skew 1-4ns (CPU early)
MODE input pin selects optional power management
input control pins
Two fixed outputs, 48MHz and 24 MHz
Separate 2.5V and 3.3V supply pins
- 2.5V or 3.3V output: CPU, IOAPIC (Strength
selectable)
- 3.3V outputs: SDRAM, PCI, REF, 48/24 MHz
No power supply sequence requirements
48 pin 300 mil SSOP
The ICS9148-25 is a Clock Synthesizer chip for Pentium and
PentiumPro plus Cyrix CPU based Desktop/Notebook systems
that will provide all necessary clock timing.
Features include four CPU, seven PCI and eight SDRAM
clocks. Two reference outputs are available equal to the crystal
frequency, plus the IOAPIC output powered by VDDL.
Additionally, the device meets the Pentium power-up
stabilization, which requires that CPU and PCI clocks be stable
within 2ms after power-up.
High drive PCICLK and SDRAM outputs typically provide
greater than 1 V/ns slew rate into 30pF loads. CPUCLK outputs
typically provide better than 1V/ns slew rate into 20pF loads
while maintaining 50 ±5% duty cycle. The REF clock outputs
typically provide better than 0.5V/ns slew rates.
The ICS9148-25 accepts a 14.318MHz reference crystal or
clock as its input and runs on a 3.3V supply.
Sperad Spectrum is modulated in center-spread mode on CPU/
SDRAM/PCI clocks. Modulation amount is selectable at
power-up (latched inputs) for ±0.5, ±1.0, ±2.0 or No spreading.
Power Groups
VDD = Supply for PLL core.
VDD1 = REF (0:2), X1, X2
VDD2 = PCICLK_F, PCICLK (0:5)
VDD3 = SDRAM (0:5), SDRAM6/CPU_STOP#,
SDRAM7/PCI_STOP#
VDD4 = 48MHz, 24MHz
VDDL1 = IOAPIC
VDDL2=CPUCLK(0:3)
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9148F-25T | 功能描述:IC CLK SYNTHESIZER CHIP 48-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ICS9148F-26 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9148F-32 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System Clock Chip |
| ICS9148F-37 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9148F-46 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CPU System Clock Generator |
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