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参数资料
| 型号： | ICS9169CM-231 |
| 英文描述： | Frequency Generator for Pentium Based Systems |
| 中文描述： | 奔腾的频率发生器的系统 |
| 文件页数： | 3/8页 |
| 文件大小： | 298K |
| 代理商： | ICS9169CM-231 |
3
ICS169C-231
Fig. 1
Shared Pin Operation - Input/Output, Pins 5, 28, 12 and
13 on the
ICS9169C-231
serve as dual signal functions to
the device. During initial power-up, they act as input pins.
The logic level (voltage) that is present on these pins at
this time is read and stored into a 4-bit internal data latch.
At the end of Power-On reset, (see AC characteristics for
timing values), the device changes the mode of operations
for these pins to an output function. In this mode the pins
produce the specified buffered clocks to external loads.
To program (load) the internal configuration register for
these pins, a resistor is connected to either the VDD (logic
1) power supply or the GND (logic 0) voltage potential. A
10 Kilohm(10K) resistor is used to provide both the solid
CMOS programming voltage needed during the power-up
programming period and to provide an insignificant load
on the output clock during the subsequent operating
period.
Figs. 1 and 2 show the recommended means of
implementing this function. In Fig. 1 either one of the
resistors is loaded onto the board (selective stuffing) to
configure the device’s internal logic. Figs. 2a and b provide
a single resistor loading option where either solder spot
tabs or a physical jumper header may be used.
These figures illustrate the optimal PCB physical layout
options. These configuration resistors are of such a large
ohmic value that they do not effect the low impedance
clock signals. The layouts have been optimized to provide
as little impedance transition to the clock signal as possible,
as it passes through the programming resistor pad(s).
Shared Pin Operation -
Input/Output Pins
The
ICS9169C-231
includes a production test verification
mode of operation. This requires that the FS0 and FS1 pins
be programmed to a logic high and the FS2 pin be
programmed to a logic low(see Shared Pin Operation
section). In this mode the device will output the following
frequencies.
Note:
REF is the frequency of either the crystal connected
between the devices X1and X2 or, in the case of a device
being driven by an external reference clock, the frequency
of the reference (or test) clock on the device’s X1 pin.
Test Mode Operation
Pin
REF
48MHz
24MHz
CPU (1:8)
Frequency
REF
REF/2
REF/4
REF2
REF/4
REF/3
BUS (1:6)
BSEL=1
BESEL = 0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9169CM-232 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator for Pentium⑩ Based Systems |
| ICS9169CM-23LF | 功能描述:IC FREQUENCY GENERATOR 28-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ICS9169CM-23LFT | 功能描述:IC FREQUENCY GENERATOR 28-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ICS9169CM-27 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator for Pentium™ Based Systems |
| ICS9169CM-271 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator for Pentium⑩ Based Systems |
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