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参数资料
| 型号： | ICS9169CM-27 |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 83.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO32 |
| 封装： | SOIC-32 |
| 文件页数： | 3/10页 |
| 文件大小： | 293K |
| 代理商： | ICS9169CM-27 |
2
ICS9169C-27
0218D—10/06/05
PIN NUMBER
PIN NAME
TYPE
DESCRIPTION
1
VDD
PWR
Power for device logic.
2X1
IN
XTAL or external reference frequency input. This input
includes XTAL load capacitance and feedback bias for a
12-16MHz crystal, nominally 14.31818MHz. External crystal
load of 30pF to GND recommended for VDD power on faster
than 2.0ms.
3
X2
OUT
XTAL output which includes XTAL load capacitance.
External crystal load of 10pF to GND recommended for VDD
power on faster than 2.0ms.
4,11,20,26
GND
PWR
Ground for device logic.
5
CPU(1)
OUT
Processor clock output which is a multiple of the input
reference frequency.
FS0
IN
Frequency multiplier select pins. See shared pin description.*
6,7,9,10,15,16,17,18,19
CPU
(2:5) (8:12)
OUT
Processor clock outputs which are a multiple of the input
reference frequency.
8
VDDC1
PWR
Power for CPU(1:6) output buffers only. Can be reduced VDD
for 2.5V (2.375-2.62V) next generation processor clocks.
12
CPU(6)
OUT
Processor clock output which is a multiple of the input
reference frequency internal pull up devices.
FS1
IN
Frequency multiplier select pin. See shared pin description.*
13
CPU(7)
OUT
Processor clock output which is a multiple of the input
reference frequency internal pull up devices.
FS2
IN
Frequency multiplier select pin. See shared pin description.*
14
VDDC2
PWR
Power for CPU PLL, logic and CPU(7:12)output buffers. Must
be nominal 3.3V (3.0 to 3.7V)
21,22,24,25,27,28
BUS (6:1)
OUT
BUS clock outputs which are a multiple of the input
reference clock.
23
VDDB
PWR
Power for BUS clock buffers BUS(1:6).
29
VDDF
PWR
Power for fixed clock buffer (48 MHz, 24 Mhz).
30
24MHz
OUT
Fixed 24MHz clock (assuming a 14.31818MHz REF
frequency).
31
48MHz
OUT
Fixed 48MHz clock (assuming a 14.31818MHz REF
frequency).
32
REF
OUT
Fixed 14.31818MHz clock (assuming a 14.31818MHz REF
frequency).
BSEL
IN
Selection for synchronous or asynchronous bus clock
operation. See shared pin programming description late in this
data sheet for further explanation.*
Pin Descriptions
* Internal pull-up will vary from 350K to 500K based on temperature.
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| ICS9169CM-232LF | 83.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9169CM-271 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator for Pentium⑩ Based Systems |
| ICS9169CM-272 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator for Pentium⑩ Based Systems |
| ICS9169CM-273 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator for Pentium⑩ Based Systems |
| ICS9169F-01 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator and Integrated Buffers for Intel Pentium and Pentium ProTM mPs |
| ICS9169F-03 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CPU System Clock Generator |
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