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参数资料
| 型号： | ICS9214DGLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9214 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封装： | 0.173 INCH, 0.65 MM PITCH, LEAD FREE, MO-153, TSSOP-28 |
| 文件页数： | 12/18页 |
| 文件大小： | 310K |
| 代理商： | ICS9214DGLF |
3
Integrated
Circuit
Systems, Inc.
ICS9214
0809E—11/17/06
General SMBus serial interface information for the ICS9214
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address D8
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte location = N
ICS clock will
acknowledge
Controller (host) sends the data byte count = X
ICS clock will
acknowledge
Controller (host) starts sending
Byte N through
Byte N + X -1
(see Note 2)
ICS clock will
acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address D8
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte
location = N
ICS clock will
acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address D9
(H)
ICS clock will
acknowledge
ICS clock will send the data byte count = X
ICS clock sends
Byte N + X -1
ICS clock sends
Byte 0 through byte X (if X
(H)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controllor (host) will send a not acknowledge bit
Controller (host) will send a stop bit
ICS (Sla ve /Re ce ive r)
T
WR
ACK
P
Byte N + X - 1
Data Byte Count = X
Beginning Byte N
stoP bit
X
B
yte
Index Block Write Operation
Slave Address D8(H)
Beginning Byte = N
WRite
starT bit
Controlle r (Host)
T
starT bit
WR
WRite
RT
Repeat starT
RD
ReaD
Beginning Byte N
Byte N + X - 1
N
Not acknowledge
PstoP bit
ICS (Sla ve /Re ce ive r)
Controlle r (Host)
X
Byte
ACK
Data Byte Count = X
ACK
Slave Address D9(H)
Index Block Read Operation
Slave Address D8(H)
Beginning Byte = N
ACK
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9214DGLFT | 功能描述:IC CLOCK GEN RAMBUS XDR 28-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ICS9214YGLF-T | 制造商:ICS 制造商全称:ICS 功能描述:Rambus XDR Clock Generator |
| ICS9219 | 制造商:ICS 制造商全称:ICS 功能描述:Direct Rambus Clock Generator Lite |
| ICS9219YGLF-T | 制造商:ICS 制造商全称:ICS 功能描述:Direct Rambus Clock Generator Lite |
| ICS9220 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Programmable RambusTM XDRTM Clock Generator |
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