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参数资料
| 型号： | ICS9248YF-189-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, SSOP-48 |
| 文件页数： | 5/15页 |
| 文件大小： | 236K |
| 代理商： | ICS9248YF-189-T |
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ICS9248-189
Advance Information
Third party brands and names are the property of their respective owners.
CPU_STOP# Timing Diagram
CPU_STOP# is an asychronous input to the clock synthesizer. It is used to turn off the CPU clocks for low power operation.
CPU_STOP# is synchronized by the ICS9248-189. The minimum that the CPU clock is enabled (CPU_STOP# high pulse) is
100 CPU clocks. All other clocks will continue to run while the CPU clocks are disabled. The CPU clocks will always be stopped
in a low state and start in such a manner that guarantees the high pulse width is a full pulse. CPU clock on latency is less than
4 CPU clocks and CPU clock off latency is less than 4 CPU clocks.
Notes:
1. All timing is referenced to the internal CPU clock.
2. CPU_STOP# is an asynchronous input and metastable conditions may exist. This signal is synchronized
to the CPU clocks inside the ICS9248-189.
3. All other clocks continue to run undisturbed.
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| ICS9248YF-195LF-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM II/III & K6 |
| ICS9248YF-199-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator for SIS 735/740 with AMD K7 Processor |
| ICS9248YF-39 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9248YF-64 | 制造商:ICS 制造商全称:ICS 功能描述:AMD-K7TM System Clock Chip |
| ICS9248YF-65 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENDIUM II Systems |
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