参数资料
型号: ICS9248YF-90LF-T
元件分类: 时钟产生/分配
英文描述: 132.99 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封装: 0.300 INCH, SSOP-48
文件页数: 7/16页
文件大小: 281K
代理商: ICS9248YF-90LF-T
15
ICS9248- 90
Connections to VDD:
General Layout Precautions:
1) Use a ground plane on the top routing
layer of the PCB in all areas not used
by traces.
2) Make all power traces and ground
traces as wide as the via pad for lower
inductance.
Notes:
1 All clock outputs should have
provisions for a 15pf capacitor
between the clock output and series
terminating resistor. Not shown in
all places to improve readability of
diagram.
2 Optional crystal load capacitors are
recommended. They should be
included in the layout but not
inserted unless needed.
C1
2
C3
1
Clock Load
C3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
Ferrite
Bead
VDD
C2
22F/20V
Tantalum
Ferrite
Bead
VDD
C2
22F/20V
Tantalum
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
= Routed Power
= Ground Connection Key (component side copper)
= Ground Plane Connection
= Power Route Connection
= Solder Pads
= Clock Load
Ground
2.5V Power Route
3.3V Power Route
相关PDF资料
PDF描述
ICS9248YF-90LF 132.99 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
ICS9248YF-95LF 124 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
ICS9248YF-96LF-T 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
ICS9248YFI-81LF 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
ICS9248YG-101LF-T 137 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
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