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参数资料
| 型号： | ICS9248YG-50LF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封装： | 6.10 MM, 0.65 MM PITCH, TSSOP-28 |
| 文件页数： | 8/11页 |
| 文件大小： | 261K |
| 代理商： | ICS9248YG-50LF-T |
6
ICS9248-50
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +115°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical C haracteristics - Inpu t/S upp ly/C om m on O utp ut P aram eters
TA = 0 - 70C; Supply Vo ltag e VDD = 3.3 V +/-5% , VDDL = 2.5 V +/-5% (unles s otherwis e s tated )
PAR AM ETER
SYM B OL
C ONDITIONS
M IN
TYP
M AX
UNITS
Input High Vo ltage
V
IH
2V
DD+0 .3
V
Input Lo w Vo ltage
V
IL
V
SS-0 .3
0 .8
V
Input High C u rren t
I
IH
V
IN = VDD
0.1
5
A
Input Lo w C u rrent
I
IL1
V
IN = 0 V; Inputs wit h no pul l-up re si sto rs
-5
2 .0
A
Input Lo w C u rrent
I
IL2
V
IN = 0 V; Inputs wit h pu ll -up resist ors
-200
-100
A
I
DD3.3OP6 6
C
L = 0 pF; Se l ec t @ 66M Hz
60
180
mA
I
DD3.3OP100
C
L = 0 pF; Se l ec t @ 100M Hz
66
180
mA
IDD2 .5 OP 66
CL = 0 p F; Select @ 66.8 M Hz
16
72
mA
IDD2.5OP 100
CL = 0 p F; Select @ 100 M Hz
23
100
mA
Po wer Do wn
Supply C u rren t
I
DD3 .3 PD
C
L = 0 pF; W i t h i nput a ddre ss to Vdd or GND
70
600
A
Input frequency
F
i
V
DD = 3.3 V;
11
14.318
16
M Hz
Input C apacitance1
C
IN
Logic Inputs
5
pF
C
INX
X1 & X2 pins
27
36
45
pF
Tran sitio n Time1
T
tran s
To 1st crossing of targ et Freq .
3
ms
C lk Stab ilizatio n 1
T
STAB
Fro m V
DD = 3.3 V t o 1% t a rg e t Freq .
3
ms
Sk ew1
T
CPU-PCI
VT = 1.5 V; VTL = 1.25 V
1.5
3
4
n s
Op eratin g
Supply C u rren t
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