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参数资料
| 型号： | ICS9248YG-92 |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 6.10 MM, 0.50 MM PITCH, TSSOP-48 |
| 文件页数： | 10/14页 |
| 文件大小： | 341K |
| 代理商： | ICS9248YG-92 |
5
ICS9248-92
Notes:
1. TCLK is a test clock driven on the X1 (crystal in pin) input during test mode.
Select Functions
T
I
B#
N
I
PN
O
I
T
P
I
R
C
S
E
DD
W
P
7
t
i
B-
d
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v
r
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R0
6
t
i
B-
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R0
5
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d
=
1
,
d
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c
=
0
(
1
4
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B
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%
5
2
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0
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5
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0
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(
0
3
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8
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8
41
2
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4
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H
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8
4
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1
t
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B
0
t
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B
-
1
t
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B
1
0
t
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B
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t
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t
S
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T
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1
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T
-
1
n
o
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p
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N
-
0
1
Serial Configuration Command Bitmaps
Byte 0: Functional and Frequency Select Clock Register (default on Bits 7, 6, 5, 4, 1, 0 = 0)
(default on Bits 3, 2 = 1)
Note: PWD = Power-Up Default
y
t
i
l
a
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o
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t
c
n
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FU
P
C
,
I
C
P
F
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I
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M
A
R
D
SF
E
R
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H
M
4
2
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8
4
n
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S
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t
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s
i
r
TZ
-
I
HZ
-
I
HZ
-
I
HZ
-
I
HZ
-
I
HZ
-
I
H
e
d
o
m
t
s
e
T2
/
K
L
C
T
1
4
/
K
L
C
T
1
2
/
K
L
C
T
1
K
L
C
T
1
4
/
K
L
C
T
1
2
/
K
L
C
T
1
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相关代理商/技术参数 |
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|---|---|
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| ICS9250-10 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for Pentium II Systems |
| ICS9250-11 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENTIUM II/III Systems |
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