参数资料
型号: ICS9250YF-08LF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封装: SSOP-56
文件页数: 6/15页
文件大小: 239K
代理商: ICS9250YF-08LF
14
ICS9250-08
0378I—07/17/03
General Layout Precautions:
1) Use a ground plane on the top layer
of the PCB in all areas not used by
traces.
2) Make all power traces and ground
traces as wide as the via pad for
lower inductance.
Notes:
1) All clock outputs should have a
series terminating resistor, and a
20pF capacitor to ground between
the resistor and clock pin. Not
shown in all places to improve
readibility of diagram.
2) Optional crystal load capacitors
are recommended. They should be
included in the layout but not
inserted unless needed.
Component Values:
C1 : Crystal load values determined by user
C2 : 22F/20V/D case/Tantalum
AVX TAJD226M020R
C3 : 100pF ceramic capacitor
C4 : 20pF capacitor
FB = Fair-Rite products 2512066017X1
All unmarked capacitors are 0.01F ceramic
Connections to VDD:
= Routed Power
= Ground Connection (component side copper)
= Ground Plane Connection
= Power Route Connection
= Solder Pads
= Clock Load
Ferrite
Bead
VDD
C2
22F/20V
Tantalum
Ferrite
Bead
VDD
C2
22F/20V
Tantalum
C3
1
Clock Load
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
2
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
3.3V Power Route
Ground
2.5V Power Route
相关PDF资料
PDF描述
ICS9250YF-14-T 149.69 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
ICS9250YF-PPP-T 149.69 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
ICS9250YF-16-T 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
ICS9250YF-18LF 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
ICS9250YF-22LF 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
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