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参数资料
| 型号： | ICS9250YF-38LF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 0.300 INCH, MO-118, SSOP-56 |
| 文件页数： | 1/18页 |
| 文件大小： | 136K |
| 代理商： | ICS9250YF-38LF-T |
Integrated
Circuit
Systems, Inc.
ICS9250-38
0404B—12/23/02
Block Diagram
Recommended Application:
CK 408 clock for Almador-M mobile chipset with Tualatin
PIII processor.
Output Features:
3 Differential CPU Clock Pairs @ 3.3V
7 PCI (3.3V) @ 33.3MHz
3 PCI_F (3.3V) @ 33.3MHz
1 USB (3.3V) @ 48MHz
1 DOT (3.3V) @ 48MHz
1 REF (3.3V) @ 14.318MHz
1 3V66 (3.3V) @ 66.6MHz
1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz
3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN
or 66.6MHz
1 66MHz_IN/3V66 (3.3V) @ Input/66MHz
Features:
Almador Chipset has a DLL driving the clock buffer
path for the 3 buffer path 66.6 MHz outputs,
66Buf(0:2).
Almador board level designs MUST use pin 22,
66Buf_1, as the feedback connection from the
clock buffer path to the Almador (GMCH)
chipset.
Supports spread spectrum modulation,
down spread 0 to -0.5%.
Efficient power management scheme through PD#,
CPU_STOP# and PCI_STOP#.
Key Specifications:
CPU Output Jitter <150ps
3V66 Output Jitter <250ps
66MHz Output Jitter (Buffered Mode Only) <100ps
CPU Output Skew <100ps
Pin Configuration
56-Pin 300mil SSOP/TSSOP
Frequency Generator with 200MHz Differential CPU Clocks
VDDREF
X1
X2
GND
PCICLK_F0
PCICLK_F1
PCICLK_F2
VDDPCI
GND
PCICLK0
PCICLK1
PCICLK2
PCICLK3
VDDPCI
GND
PCICLK4
PCICLK5
PCICLK6
VDD3V66
GND
66MHz_OUT0/3V66_2
66MHz_OUT1/3V66_3
66MHz_OUT2/3V66_4
66MHz_IN/3V66_5
*PD#
VDDA
GND
Vtt_PWRGD#
REF
FS1
FS0
CPU_STOP#*
CPUCLKT0
CPUCLKC0
VDDCPU
CPUCLKT1
CPUCLKC1
GND
VDDCPU
CPUCLKT2
CPUCLKC2
MULTSEL0*
I REF
GND
FS2
48MHz_USB
48MHz_DOT
VDD48
GND
3V66_1/VCH_CLK
PCI_STOP#*
3V66_0
VDD3V66
GND
SCLK
SDATA
ICS9250-38
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
Functionality
PLL2
PLL1
Spread
Spectrum
48MHz_USB
PCICLK (6:0)
3V66 (5:2,0)
66MHz_OUT (2:0)
48MHz_DOT
3V66_1/VCH_CLK
X1
X2
XTAL
OSC
CPU
DIVDER
PCI
DIVDER
3V66
DIVDER
66MHz
DIVDER
PD#
CPU_STOP#
PCI_STOP#
MULTSEL0
SDATA
SCLK
FS (2:0)
I REF
66MHz_IN
Control
Logic
Config.
Reg.
REF
3
7
5
3
CPUCLKT (2:0)
CPUCLKC (2:0)
PCICLK_F (2:0)
Stop
2
S
F1
S
F0
S
F
U
P
C
)
z
H
M
(
6
V
3
)
z
H
M
(
]
0
:
2
[
f
u
B
6
]
2
:
4
[
6
V
3
)
z
H
M
(
F
_
I
C
P
I
C
P
)
z
H
M
(
00
0
6
.
6
66
6
.
6
66
6
.
6
63
3
.
3
00
1
0
.
0
16
6
.
6
66
6
.
6
63
3
.
3
01
0
.
0
26
6
.
6
66
6
.
6
63
3
.
3
01
1
3
.
3
16
6
.
6
66
6
.
6
63
3
.
3
10
0
6
.
6
66
6
.
6
6N
I
_
z
H
M
6
62
/
N
I
_
z
H
M
6
10
1
0
.
0
16
6
.
6
6N
I
_
z
H
M
6
62
/
N
I
_
z
H
M
6
11
0
.
0
26
6
.
6
6N
I
_
z
H
M
6
62
/
N
I
_
z
H
M
6
11
1
3
.
3
16
6
.
6
6N
I
_
z
H
M
6
62
/
N
I
_
z
H
M
6
d
i
M0
0
e
t
a
t
s
i
r
Te
t
a
t
s
i
r
Te
t
a
t
s
i
r
Te
t
a
t
s
i
r
T
d
i
M0
1
2
/
K
L
C
T4
/
K
L
C
T4
/
K
L
C
T8
/
K
L
C
T
d
i
M1
0
d
e
v
r
e
s
e
Rd
e
v
r
e
s
e
Rd
e
v
r
e
s
e
Rd
e
v
r
e
s
e
R
d
i
M1
1
d
e
v
r
e
s
e
Rd
e
v
r
e
s
e
Rd
e
v
r
e
s
e
Rd
e
v
r
e
s
e
R
* These inputs have 150K internal pull-up resistor to VDD.
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相关代理商/技术参数 |
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| ICS932S200BFLF | 功能描述:IC FREQ TIMING GENERATOR 56-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
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