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参数资料
| 型号： | ICS9250YF-38LF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 0.300 INCH, MO-118, SSOP-56 |
| 文件页数： | 8/18页 |
| 文件大小： | 136K |
| 代理商： | ICS9250YF-38LF-T |
16
ICS9250-38
0404B—12/23/02
When PD# is sampled low by two consecutive rising edges of CPU clock then all clock outputs except CPU clocks
must be held low on their next high to low transition. CPU clocks must be held with the CPU clock pin driven high with
a value of 2x Iref, and CPUC undriven. Note the example below shows CPU = 100MHz, this diagram and description
is applicable for all valid CPU frequencies 66, 100, 133, 200MHz.
Due to the state of the internal logic, stopping and holding the REF clock outputs in the LOW state may require more
than one clock cycle to complete.
PD# - Assertion (transition from logic "1" to logic "0")
PD# Functionality
#
P
O
T
S
_
U
P
CT
U
P
CC
U
P
C6
6
V
3T
U
O
_
z
H
M
6
F
_
K
L
C
I
C
P
K
L
C
I
C
P
K
L
C
I
C
P
T
O
D
/
B
S
U
z
H
M
8
4
1l
a
m
r
o
Nl
a
m
r
o
Nz
H
M
6
6N
I
_
z
H
M
6
6N
I
_
z
H
M
6
6N
I
_
z
H
M
6
6z
H
M
8
4
0t
l
u
M
*
f
e
r
it
a
o
l
Fw
o
Lw
o
Lw
o
Lw
o
Lw
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L
Power Down Assertion of Waveforms - Buffered Mode
0ns
PD#
CPUT 100MHz
CPUC 100MHz
3V66MHz
66MHz_IN
66MHz_OUT
PCI 33MHz
USB 48MHz
REF 14.318MHz
25ns
50ns
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9250YF-38-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| ICS9250YG-22-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator for P IV⑩ |
| ICS9250YG-38-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| ICS932S200 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for Dual Server/Workstation Systems |
| ICS932S200BFLF | 功能描述:IC FREQ TIMING GENERATOR 56-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
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