| 型号: | ICS93701YGLFT |
| 厂商: | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类: | 时钟及定时 |
| 英文描述: | 93701 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装: | 0.240 INCH, 0.50 MM PITCH, MO-153, TSSOP-48 |
| 文件页数: | 1/9页 |
| 文件大小: | 203K |
| 代理商: | ICS93701YGLFT |

相关PDF资料 |
PDF描述 |
|---|---|
| ICS93722YFT | 93722 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28 |
| ICS93722YFLFT | 93722 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28 |
| ICS93728YFLFT | LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 12 INVERTED OUTPUT(S), PDSO48 |
| ICS93732YGLF-T | 93732 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28 |
| ICS93732YFLF-T | 93732 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS93701YGT | 制造商:ICS 制造商全称:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93705 | 制造商:ICS 制造商全称:ICS 功能描述:DDR Phase Lock Loop Zero Delay Clock Buffer |
| ICS93705YF-T | 制造商:ICS 制造商全称:ICS 功能描述:DDR Phase Lock Loop Zero Delay Clock Buffer |
| ICS93712 | 制造商:ICS 制造商全称:ICS 功能描述:2 DIMM DDR Fanout Buffer |
| ICS93712YF-PPP-T | 制造商:ICS 制造商全称:ICS 功能描述:2 DIMM DDR Fanout Buffer |