参数资料
型号: ICS93701YGLFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 93701 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
封装: 0.240 INCH, 0.50 MM PITCH, MO-153, TSSOP-48
文件页数: 4/9页
文件大小: 203K
代理商: ICS93701YGLFT
4
ICS93701
0417B—10/29/02
Absolute Maximum Ratings
Supply Voltage (VDD & AVDD) . . . . . . . . . . . -0.5V to 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD + 0.5 V
Ambient Operating Temperature . . . . . . . . . . 0°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input / Supply / Common Output Parameters
TA = 0 - 85
oC; Supply Voltage A
VDD, VDD = 2.5V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input High Current
IIH
VIN = VDD or GND
5
A
Input Low Current
IIL
VIN = VDD or GND
5
A
IDD2.5
CL = 0pF @ 100MHz
185
210
mA
IDDPD
CL = 0pF @ 100MHz
0.15
100
mA
Output High Current
IOH
VDD = 2.3V, VOUT = 1V
-18
-32
mA
Output Low Current
IOL
VDD = 2.3V, VOUT = 1.2V
26
35
mA
Input Clamp Voltage
VIK
VDDQ = 2.3V IIN = -18mA
-1.2
V
VDD = min to max,
IOH = -1 mA
VDDQ = 2.3V,
IOH = -12 mA
VDD = min to max
IOL=1 mA
VDDQ = 2.3 V
IOL=12 mA
Input Capacitance
1
CIN
VIN = GND or VDD
3pF
Output Capacitance
1
COUT
VOUT = GND or VDD
3pF
1Guaranteed by design, not 100% tested in production.
Operating Supply
Current
High Impedance Output
Current
IOZ
VDD=2.7V, VOUT=VDD or GND
0.1
±10
A
0.6
VOL
Low-level output voltage
High-level output
voltage
VOH
VDDQ - 0.1
1.7
V
0.05
2.45
V
0.35
0.1
2.10
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