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参数资料
| 型号： | ICS93722CFLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 93722 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28 |
| 封装： | 0.209 INCH, LEAD FREE, MO-150, SSOP-28 |
| 文件页数： | 3/7页 |
| 文件大小： | 84K |
| 代理商： | ICS93722CFLFT |
IDTTM/ICSTM Low Cost DDR Phase Lock Loop Zero Delay Buffer
ICS93722
REV F 02/11/07
ICS93722
Low Cost DDR Phase Lock Loop Zero Delay Buffer
Absolute Max
Electrical Characteristics - Input/Supply/Common Output Parameters
Stresses above those listed under
Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
TA = 0 - 70°C; Supply Voltage VDD = 2.5 V +/-0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input High Current
IIH
VIN = VDD or GND
A
Input Low Current
IIL
VIN = VDD or GND
A
IDD2.5
CL = 0 pF at 133 MHz
275
325
mA
IDDPD
CL = 0 pF
100
A
Output High Current
IOH
VDD = 2.3V, VOUT = 1V
-43
-18
mA
Output High Current
IOL
VDD = 2.3V, VOUT = 1.2V
26
43
mA
High Impedance Output
Current
IOZ
VDD = 2.7V, VOUT = VDD or GND
10
A
Input Clamp Voltage
VIK
IIN = -18 mA;
V
VDD = min to max, IOH = -1mA
2.1
2.42
V
VDD = 2.3V, IOH = -12mA
1.87
V
VOL
VDD = min to max, IOH = 1mA
0.04
0.1
V
VDD = 2.3V, IOH = 12mA
0.35
0.6
V
Input Capacitance
1
CIN
VIN = VDD or GND
pF
Output Capacitance
1
COUT
VOUT = VDD or GND
3pF
1. Guaranteed by design, not 100% tested in production.
Operating Supply Current
VOH
Low-level Output Voltage
High-level Output Voltage
Supply Voltage (VDD & AVDD)
-0.5V to 3.6V
Logic Inputs
GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature
0°C to +85°C
Case Temperature
115°C
Storage Temperature
–65°C to +150°C
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相关代理商/技术参数 |
参数描述 |
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| ICS93722YFLFT | 制造商:ICS 制造商全称:ICS 功能描述:Low Cost DDR Phase Lock Loop Zero Delay Buffer |
| ICS93725 | 制造商:ICS 制造商全称:ICS 功能描述:DDR and SDRAM Zero Delay Buffer |
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| ICS93732 | 制造商:ICS 制造商全称:ICS 功能描述:Low Cost DDR Phase Lock Loop Zero Delay Buffer |
| ICS93732AF | 功能描述:IC DDR PLL ZD BUFFER 28-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
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