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参数资料
型号： ICS93728YFLFT
元件分类： 时钟及定时
英文描述： LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 12 INVERTED OUTPUT(S), PDSO48
封装： 0.300 INCH, SSOP-48
文件页数： 2/9页
文件大小： 87K
代理商： ICS93728YFLFT
2
ICS93728
Preliminary Product Preview
0712A—09/20/02
Pin Descriptions
PIN
#
NAME
TYPE
1
FB_OUT
OUT
Feedback output, dedicated for external feedback.
2
VDD2.5
PWR
Power supply, nominal 2.5V
3
GND
PWR
Ground pin.
4
DDRT0
OUT
"True" Clock of differential pair output.
5
DDRC0
OUT
"Complementary" Clock of differential pair output.
6
DDRT1
OUT
"True" Clock of differential pair output.
7
DDRC1
OUT
"Complementary" Clock of differential pair output.
8
VDD2.5
PWR
Power supply, nominal 2.5V
9
GND
PWR
Ground pin.
10
DDRT2
OUT
"True" Clock of differential pair output.
11
DDRC2
OUT
"Complementary" Clock of differential pair output.
12
VDD2.5
PWR
Power supply, nominal 2.5V
13
BUF_IN
IN
Input Buffers for memory outputs.
14
GND
PWR
Ground pin.
15
DDRT3
OUT
"True" Clock of differential pair output.
16
DDRC3
OUT
"Complementary" Clock of differential pair output.
17
VDD2.5
PWR
Power supply, nominal 2.5V
18
GND
PWR
Ground pin.
19
DDRT4
OUT
"True" Clock of differential pair output.
20
DDRC4
OUT
"Complementary" Clock of differential pair output.
21
DDRT5
OUT
"True" Clock of differential pair output.
22
DDRC5
OUT
"Complementary" Clock of differential pair output.
23
VDD2.5
PWR
Power supply, nominal 2.5V
24
SDATA
I/O
Data pin for I2C circuitry.
25
SCLK
IN
Clock pin of I2C circuitry.
26
GND
PWR
Ground pin.
27
DDRC6
OUT
"Complementary" Clock of differential pair output.
28
DDRT6
OUT
"True" Clock of differential pair output.
29
DDRC7
OUT
"Complementary" Clock of differential pair output.
30
DDRT7
OUT
"True" Clock of differential pair output.
31
GND
PWR
Ground pin.
32
VDD2.5
PWR
Power supply, nominal 2.5V
33
DDRC8
OUT
"Complementary" Clock of differential pair output.
34
DDRT8
OUT
"True" Clock of differential pair output.
35
GND
PWR
Ground pin.
36
PD#*
IN
Asynchronous active low input pin used to power down the device
into a low power state. The latency of the power down will not be
greater than 3ms.
37
VDD2.5
PWR
Power supply, nominal 2.5V
38
DDRC9
OUT
"Complementary" Clock of differential pair output.
39
DDRT9
OUT
"True" Clock of differential pair output.
40
GND
PWR
Ground pin.
41
VDD2.5
PWR
Power supply, nominal 2.5V
42
DDRC10
OUT
"Complementary" Clock of differential pair output.
43
DDRT10
OUT
"True" Clock of differential pair output.
44
DDRC11
OUT
"Complementary" Clock of differential pair output.
45
DDRT11
OUT
"True" Clock of differential pair output.
46
GND
PWR
Ground pin.
47
VDD2.5
PWR
Power supply, nominal 2.5V
48
RFINE**
IN
Exnterna pull-down resistor can be set on this pin to program input to
DDR clocks skew.
DESCRIPTION
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