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参数资料
| 型号： | ICS93732YFLF-T |
| 元件分类： | 时钟及定时 |
| 英文描述： | 93732 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28 |
| 封装： | 0.209 INCH, ROHS COMPLIANT, MO-150, SSOP-28 |
| 文件页数： | 3/9页 |
| 文件大小： | 94K |
| 代理商： | ICS93732YFLF-T |
3
ICS93732
0578I—05/18/05
Absolute Maximum Ratings
Supply Voltage (VDD & AVDD) . . . . . . . . . . -0.5V to 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . 0°C to +85°C
Case Temperature . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under
Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above
those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
Electrical Characteristics - Input / Supply / Common Output parameters
TA = 0 - 70°C; Supply Voltage AVDD, VDD = 2.50V ± 0.20V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RT = 120W, CL = 12 pF at 100MHz
236
300
RT = 120W, CL = 12 pF at 133MHz
263
300
IDDPD
CL=0 pF
100
mA
Output High Current
IOH
VDD = 2.5V, VOUT = 1V
-48
-33
-29
mA
Output Low Current
IOL
VDD = 2.5V, VOUT = 1.2V
29
33
37
mA
High Impedance
Ouptut Current
VDD = min to max, IOH = -1mA
2
2.25
V
VDD = 2.3V, IOH = -12mA
1.95
VDD = min to max, IOH = 1mA
0.05
0.1
V
VDD = 2.3V, IOH = 12mA
0.3
0.4
Output Capacitance
1
COUT
VI = VDD or GND
3
pF
1. Guaranteed by design, not 100% tested in production.
Operating Supply Current
IOZ
VDD = 2.7V, VOUT = VDD or GND
Low-level Output Voltage
VOL
High-level Output Voltage
mA
10
VOH
mA
IDD2.5
Recommended Operation Conditions
TA = 0 - 70°C; Supply Voltage AVDD, VDD = 2.50V ± 0.20V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Analog / Core Supply Volta
AVDD
2.3
2.5
2.7
V
Input Voltage Level
VIN
22.5
3
V
Output Differential Pair
Crossing Voltage
1.32
V
VOC
66/100/133/166MHz, VDD=2.50V
1.23
1.25
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| ICS93772AF | 功能描述:IC DDR PLL ZD BUFFER 28-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
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