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参数资料
| 型号： | ICS93V857YG-25LFT |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装： | 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-48 |
| 文件页数： | 3/10页 |
| 文件大小： | 214K |
| 代理商： | ICS93V857YG-25LFT |
2
ICS93V857-XXX
Preliminary Product Preview
Pin Descriptions
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This PLL Clock Buffer is designed for a VDD of 2.5V, an AVDD of 2.5V and differential data input and output levels.
The ICS93V857-XXX is a zero delay buffer that distributes a differential clock input pair (CLK_INC, CLK_INT) to ten differential
pair of clock outputs (CLKT[0:9], CLKC[0:9]) and one differential pair feedback clock output (FB_OUT, FB_OUTC). The clock
outputs are controlled by the input clocks (CLK_INC, CLK_INT), the feedback clocks (FB_INT, FB_INC) the 2.5-V LVCMOS
input (PD#) and the Analog Power input (AVDD). When input (PD#) is low while power is applied, the receivers are disabled, the
PLL is turned off and the differential clock outputs are Tri-Stated. When AVDD is grounded, the PLL is turned off and bypassed
for test purposes.
When the input frequency is less than the operating frequency of the PLL, appproximately 20MHz, the device will enter a low
power mode. An input frequency detection circuit on the differential inputs, independent from the input buffers, will detect the
low frequency condition and perform the same low power features as when the (PD#) input is low. When the input frequency
increases to greater than approximately 20 MHz, the PLL will be turned back on, the inputs and outputs will be enabled and PLL
will obtain phase lock between the feedback clock pair (FB_INT, FB_INC) and the input clock pair (CLK_INC, CLK_INT).
The PLL in the ICS93V857-XXX clock driver uses the input clocks (CLK_INC, CLK_INT) and the feedback clocks (FB_INT,
FB_INC) provide high-performance, low-skew, low-jitter output differential clocks (CLKT [0:9], CLKC [0:9]). The ICS93V857-
XXX is also able to track Spread Spectrum Clock (SSC) for reduced EMI.
The ICS93V857-XXX is characterized for operation from 0°C to 70°C.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS93V857YL-025T | 制造商:ICS 制造商全称:ICS 功能描述:2.5V Wide Range Frequency Clock Driver |
| ICS93V857YL-125T | 制造商:ICS 制造商全称:ICS 功能描述:2.5V Wide Range Frequency Clock Driver |
| ICS93V857YL-130T | 制造商:ICS 制造商全称:ICS 功能描述:2.5V Wide Range Frequency Clock Driver |
| ICS94201 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
| ICS94201DF | 功能描述:IC FREQ GENERATOR PROGR 56-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
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