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参数资料
| 型号： | ICSSSTVA16859CK-LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 锁存器 |
| 英文描述： | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, QCC56 |
| 封装： | MLF-56 |
| 文件页数： | 8/12页 |
| 文件大小： | 238K |
| 代理商： | ICSSSTVA16859CK-LF |
5
ICSSSTVF16859
Advance Information
0776—03/18/03
DC Electrical Characteristics - DDRI/DDR333 (PC1600, PC2100, PC2700)
TA = 0 - 70°C; VDD = 2.5 +/-0.2V, VDDQ=2.5 +/-0.2V; (unless otherwise stated)
SYMBOL
PARAMETERS
VDDQ
MIN
TYP
MAX
UNITS
VIK
II = -18mA
2.3V
-1.2
IOH = -100A
2.3V-2.7V
VDDQ -
0.2
IOH = -8mA
2.3V
1.95
IOL = 100A
2.3V-2.7V
0.2
IOL = 8mA
2.3V
0.35
II
All Inputs
VI = VDD or GND
2.7V
±5
A
Standby (Static)
RESET# = GND
0.01
A
Operating (Static)
VI = VIH(AC) or VIL(AC),
RESET# = VDD
25
mA
Dynamic operating
(clock only)
RESET# = VDD,
VI = VIH(AC) or VIL(AC),
CLK and CLK# switching
50% duty cycle.
30
/clock
MHz
Dynamic Operating
(per each data input)
RESET# = VDD,
VI = VIH(AC) or VIL (AC),
CLK and CLK# switching
50% duty cycle. One data
input switching at half
clock frequency, 50%
duty cycle
10
A/ clock
MHz/data
rOH
Output High
2.3V-2.7V
7
13.5
20
rOL
Output Low
2.3V-2.7V
7
13
20
rO(D)
[rOH - rOL] each
separate bit
2.5V
4
Data Inputs
2.5
3.5
CLK and CLK#
2.5
3.5
Notes:
1 - Guaranteed by design, not 100% tested in production.
IO = 0
CONDITIONS
2.7V
2.5V
VI = VREF ±350mV
VICR = 1.25V, VI(PP) = 360mV
pF
IOH = -16mA
V
Ci
IOL = 16mA
IO = 20mA, TA = 25° C
VOH
VOL
IDD
IDDD
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| ICSSSTVA16859CK | SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, QCC56 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICSSSTVF16859 | 制造商:ICS 制造商全称:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTVF16859BKLFT | 制造商:ICS 功能描述: |
| ICSSSTVF16859BKT | 制造商:ICS 功能描述: |
| ICSSSTVF16859YK | 制造商:ICS 制造商全称:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSS-VE-PU-N | 制造商:Black Box Corporation 功能描述:iCOMPEL S Series VESA Publisher |
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