参数资料
型号: ID80C52CXXX-16:D
厂商: ATMEL CORP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40
封装: CERAMIC, DIP-40
文件页数: 43/134页
文件大小: 3805K
16
8068U–AVR–06/2013
XMEGA A3
Not recommended for new designs -
Use XMEGA A3U series
9.
Event System
9.1
Features
Inter-peripheral communication and signalling with minimum latency
CPU and DMA independent operation
8 Event Channels allows for up to 8 signals to be routed at the same time
Events can be generated by
– Timer/Counters (TCxn)
– Real Time Counter (RTC)
– Analog to Digital Converters (ADCx)
– Analog Comparators (ACx)
– Ports (PORTx)
– System Clock (Clk
SYS)
– Software (CPU)
Events can be used by
– Timer/Counters (TCxn)
– Analog to Digital Converters (ADCx)
– Digital to Analog Converters (DACx)
– Ports (PORTx)
– DMA Controller (DMAC)
– IR Communication Module (IRCOM)
The same event can be used by multiple peripherals for synchronized timing
Advanced Features
– Manual Event Generation from software (CPU)
– Quadrature Decoding
– Digital Filtering
Functions in Active and Idle mode
9.2
Overview
The Event System is a set of features for inter-peripheral communication. It enables the possibil-
ity for a change of state in one peripheral to automatically trigger actions in one or more
peripherals. What changes in a peripheral that will trigger actions in other peripherals are config-
urable by software. It is a simple, but powerful system as it allows for autonomous control of
peripherals without any use of interrupts, CPU or DMA resources.
The indication of a change in a peripheral is referred to as an event, and is usually the same as
the interrupt conditions for that peripheral. Events are passed between peripherals using a dedi-
cated routing network called the Event Routing Network. Figure 9-1 on page 17 shows a basic
block diagram of the Event System with the Event Routing Network and the peripherals to which
it is connected. This highly flexible system can be used for simple routing of signals, pin func-
tions or for sequencing of events.
The maximum latency is two CPU clock cycles from when an event is generated in one periph-
eral, until the actions are triggered in one or more other peripherals.
The Event System is functional in both Active and Idle modes.
相关PDF资料
PDF描述
ID80C52EXXX-25:D 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
ID80C52EXXX-L16:D 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40
ID80C52XXX-25:D 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
ID80C52XXX-36SHXXX:D 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CDIP40
ID80C52XXX-L16:D 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40
相关代理商/技术参数
参数描述
ID80C86 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor
ID80C86-2 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor
ID80C88 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CMOS 8/16-Bit Microprocessor
ID80C88-2 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CMOS 8/16-Bit Microprocessor
ID810 制造商:IBase Technology (USA) Inc. 功能描述:FC, ID810 XGI Z11 VGA/LVDS, FOR ECX810, (ROHS) - Bulk