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参数资料
| 型号： | IDT54FCT16952ETEB |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDFP56 |
| 封装： | CERPACK-56 |
| 文件页数： | 1/7页 |
| 文件大小： | 73K |
| 代理商： | IDT54FCT16952ETEB |
1
IDT54/74FCT16925AT/BT/CT/ET
FASTCMOS16-BITREGISTEREDTRANSCEIVER
MILITARYANDINDUSTRIALTEMPERATURERANGES
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage
≤≤≤≤≤1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
High drive outputs (-32mA IOH, 64mA IOL)
Power off disable outputs permit “live insertion”
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,
TA = 25°C
Available in the following packages:
– Industrial: SSOP, TSSOP
– Military: CERPACK
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
JUNE 2000
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
2000 Integrated Device Technology, Inc.
DSC-5442/1
IDT54/74FCT16952AT/BT/CT/ET
FAST CMOS
16-BIT REGISTERED
TRANSCEIVER
DESCRIPTION:
The FCT16952T 16-bit registered transceiver is built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit D-type registered transceivers with
separate input and output control for independent control of data flow in either
direction. For example, the A-to-B Enable (x
CEAB) must be low to enter
data from the A port. xCLKAB controls the clocking function. When xCLKAB
toggles from low-to-high, the data present on the A port will be clocked into
the register. x
OEAB performs the output enable function on the B port. Data
flow from the B port to A port is similar but requires using x
CEBA, xCLKBA,
and x
OEBA inputs. Full 16-bit operation is achieved by tying the control pins
of the independent transceivers together.
The FCT16952T is ideally suited for driving high-capacitance loads and
low-impedance backplanes. The output buffers are designed with power off
disable capability allowing "live insertion" of boards when used as backplane
drivers.
2
OEAB
2
CE BA
2
CLKBA
2
OEBA
2
CE AB
2
CLKAB
2
A 1
2
B 1
TO SEVEN OTHE R CHANNELS
D
C
D
C
CE
1
OEAB
1
CE BA
1
CLKBA
1
OEBA
1
CE AB
1
CLKAB
1
A1
1
B1
TO SEVEN OTHE R CHANNELS
D
C
D
C
CE
54
55
1
3
2
56
5
52
31
30
28
26
27
29
15
42
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