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参数资料
| 型号： | IDT5993A-2Q8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封装： | QSOP-28 |
| 文件页数： | 1/8页 |
| 文件大小： | 65K |
| 代理商： | IDT5993A-2Q8 |
1
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT5993A
PROGRAMMABLESKEWPLLCLOCKDRIVERTURBOCLOCK
SEPTEMBER 2001
2001
Integrated Device Technology, Inc.
DSC 5844/1
c
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
3 pairs of programmable skew outputs
Low skew: 200ps same pair, 250ps all outputs
Selectable positive or negative edge synchronization:
Excellent for DSP applications
Synchronous output enable
Output frequency: 3.75MHz to 100MHz
2x, 4x, 1/2, and 1/4 outputs
5V with TTL outputs
3 skew grades:
IDT5993A-2: tSKEW0<250ps
IDT5993A-5: tSKEW0<500ps
IDT5993A-7: tSKEW0<750ps
3-level inputs for skew and PLL range control
PLL bypass for DC testing
External feedback, internal loop filter
46mA IOL high drive outputs
Low Jitter: <200ps peak-to-peak
Outputs drive 50
terminated lines
Available in QSOP package
FUNCTIONAL BLOCK DIAGRAM
GND/sO E
1Q0
Skew
Select
1Q1
1F1:0
3
2Q0
Skew
Select
2Q1
2F1:0
FS
3
REF
PLL
FB
3
3Q0
Skew
Select
3Q1
3F1:0
3
4Q0
4Q1
3
VCCQ /PE
IDT5993A
PROGRAMMABLE SKEW
PLL CLOCK DRIVER
TURBOCLOCK
DESCRIPTION:
The IDT5993A is a high fanout PLL based clock driver intended for
high performance computing and data-communications applications. A
key feature of the programmable skew is the ability of outputs to lead or
lag the REF input signal. The IDT5993A has six programmable skew
outputs and two zero skew outputs. Skew is controlled by 3-level input
signals that may be hard-wired to appropriate HIGH-MID-LOW levels.
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