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参数资料
| 型号： | IDT5T9010BBI8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 5T SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA144 |
| 封装： | PLASTIC, BGA-144 |
| 文件页数： | 1/23页 |
| 文件大小： | 168K |
| 代理商： | IDT5T9010BBI8 |
1
INDUSTRIALTEMPERATURERANGE
IDT5T9010
2.5V PROGRAMMABLE SKEW PLL CLOCK DRIVER TERACLOCK
1sOE
2sOE
1
Q0
1
Q1
2
Q0
2
Q1
3
Q0
3
Q1
4
Q0
4
Q1
5
Q0
5
Q1
QFB
Skew
Select
1F2:0
Skew
Select
2F2:0
Skew
Select
3F2:0
Skew
Select
4F2:0
Skew
Select
5F2:0
TxS
REF0
REF0/
VREF0
FB
FB/
VREF2
RxS
REF1
REF1/
VREF1
0
1
PLL
PD
FS
LOCK
PE
PLL_EN
/N
DS1:0
3
REF_SEL
0
1
Skew
Select
FBF2:0
OMODE
3sOE
4sOE
5sOE
3
NOVEMBER 2004
2003
Integrated Device Technology, Inc.
DSC 5979/23
c
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
2.5 VDD
5 pairs of programmable skew outputs
Low skew: 50ps same pair, 100ps all outputs
Selectable positive or negative edge synchronization
Tolerant of spread spectrum input clock
Synchronous output enable
Selectable reference input
Input frequency: 4.17MHz to 250MHz
Output frequency: 12.5MHz to 250MHz
1.8V / 2.5V LVTTL: up to 250MHz
HSTL / eHSTL: up to 250MHz
Hot insertable and over-voltage tolerant inputs
3-level inputs for skew control
3-level inputs for selectable interface
3-level inputs for divide selection multiply/divide ratios of
(1-6, 8, 10, 12) / (2, 4)
Selectable HSTL, eHSTL, 1.8V/2.5V LVTTL, or LVEPECL input
interface
Selectable differential or single-ended inputs and ten single-
ended outputs
PLL bypass for DC testing
External differential feedback, internal loop filter
Low Jitter: <75ps cycle-to-cycle
Power-down mode
Lock indicator
Available in BGA package
FUNCTIONAL BLOCK DIAGRAM
IDT5T9010
2.5V PROGRAMMABLE SKEW
PLL CLOCK DRIVER
TERACLOCK
DESCRIPTION:
The IDT5T9010 is a 2.5V PLL clock driver intended for high perfor-
mance computing and data-communications applications. A key feature of
the programmable skew is the ability of outputs to lead or lag the REF input
signal. The IDT5T9010 has ten programmable skew outputs in five banks
of two, plus a dedicated differential feedback. Skew is controlled by 3-level
input signals that may be hard-wired to appropriate high-mid-low levels.
The redundant input capability allows for a smooth change over to a
secondary clock source when the primary clock source is absent.
The feedback bank allows divide-by-functionality from 1 to 12 through
the use of the DS[1:0] inputs. This provides the user with frequency
multiplication 1 to 12 without using divided outputs for feedback. Each output
bank also allows for a divide-by-functionality of 2 or 4.
The IDT5T9010 features a user-selectable, single-ended or differential
inputtotensingle-endedoutputs. Theclockdriveralsoactsasatranslatorfrom
a differential HSTL, eHSTL, 1.8V/2.5V LVTTL, LVEPECL, or single-ended
1.8V/2.5V LVTTL input to HSTL, eHSTL, or 1.8V/2.5V LVTTL outputs.
Selectableinterfaceiscontrolledby3-levelinputsignalsthatmaybehard-wired
to appropriate high-mid-low levels. The outputs can be synchronously
enabled/disabled.
Furthermore, when PE is held high, all the outputs are synchronized with
the positive edge of the REF clock input. When PE is held low, all the outputs
are synchronized with the negative edge of REF.
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| IDT5T9050PGGI | 功能描述:IC CLK BUFFER 1:5 200MHZ 28TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:- 产品培训模块:High Bandwidth Product Overview 标准包装:1,000 系列:Precision Edge® 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:4 差分 - 输入:输出:是/是 输入:CML，LVDS，LVPECL 输出:CML 频率 - 最大:2.5GHz 电源电压:2.375 V ~ 2.625 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) |
| IDT5T9050PGGI8 | 功能描述:IC CLK BUFF 1:5 200MHZ 28-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:- 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
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