参数资料
型号: IDT7007S20PF8
厂商: IDT, Integrated Device Technology Inc
文件页数: 14/21页
文件大小: 0K
描述: IC SRAM 256KBIT 20NS 80TQFP
标准包装: 750
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,异步
存储容量: 256K (32K x 8)
速度: 20ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
封装/外壳: 80-LQFP
供应商设备封装: 80-TQFP(14x14)
包装: 带卷 (TR)
其它名称: 7007S20PF8
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Timing Waveform of Write with Port-to-Port Read and BUSY (2,5)
(M/ S = V IH ) (4)
t WC
ADDR "A"
MATCH
t WP
R/ W "A"
t DW
t DH
DATA IN "A"
ADDR "B"
t APS
(1)
VALID
MATCH
BUSY "B"
t WDD
t BDA
t BDD
DATA OUT "B"
NOTES:
t DDD
(3)
VALID
2940 drw 13
1. To ensure that the earlier of the two ports wins. t APS is ignored for M/ S = V IL (SLAVE).
2. CE L = CE R = V IL
3. OE = V IL for the reading port.
4. If M/ S = V IL (SLAVE), then BUSY is an input ( BUSY "A" = V IH and BUSY "B" = "don't care", for this example).
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from port "A".
Timing Waveform of Write with BUSY (M/ S = V IL )
t WP
R/ W "A"
t WB
BUSY "B"
R/ W "B"
(2)
t WH (1)
,
2940 drw 14
NOTES:
1. t WH must be met for both BUSY input (SLAVE) and output (MASTER).
2. BUSY is asserted on port "B" blocking R/ W "B" , until BUSY "B" goes HIGH.
14
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