参数资料
型号: IDT70T3509MS133BPG
厂商: IDT, Integrated Device Technology Inc
文件页数: 22/23页
文件大小: 0K
描述: IC SRAM 36MBIT 133MHZ 256BGA
标准包装: 3
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,同步
存储容量: 36M(1M x 36)
速度: 133MHz
接口: 并联
电源电压: 2.4 V ~ 2.6 V
工作温度: 0°C ~ 70°C
封装/外壳: 256-BGA
供应商设备封装: 256-CABGA(17x17)
包装: 托盘
产品目录页面: 1254 (CN2011-ZH PDF)
其它名称: 70T3509MS133BPG
800-1379
IDT70T3509M
High-Speed 2.5V
1024K x 36 Dual-Port Synchronous Static RAM
Commercial Temperature Range
Identification Register Definitions
Instruction Field Array D
Revision Number (31:28)
Value
Array D
0x0
Instruction Field Array C
Revision Number (63:60)
Value
Array C
0x0
Instruction Field Array B
Revision Number (95:92)
Value
Array B
0x0
Instruction Field Array A
Revision Number (127:124)
Value
Array A
0x0
Description
Reserved for Version number
IDT Device ID (27:12)
0x333 IDT Device ID (59:44)
0x333 IDT Device ID (91:76)
0x333 IDT Device ID (123:108)
0x333 Defines IDT Part number
IDT JEDEC ID (11:1)
0x33 IDT JEDEC ID (43:33)
0x33
IDT JEDEC ID (75:65)
0x33
IDT JEDEC ID (107:97)
0x33
Allows unique identification of device vendor as IDT
ID Register Indicator Bit (Bit 0)
1
ID Register Indicator Bit (Bit 32)
1
ID Register Indicator Bit (Bit 64)
1
ID Register Indicator Bit (Bit 96)
1
Indicates the presence of an ID Register
5682 tbl 16
Scan Register Sizes
Register Name
Instruction (IR)
Bypass (BYR)
Identification (IDR)
Boundary Scan (BSR)
Bit Size
Array A
4
1
32
Note (3)
Bit Size
Array B
4
1
32
Note (3)
Bit Size
Array C
4
1
32
Note (3)
Bit Size
Array D
4
1
32
Note (3)
Bit Size
70T3509M
16
4
128
Note (3)
5682 tbl 17
System Interface Parameters
Instruction
EXTEST
BYPASS
IDCODE
HIGHZ
CLAMP
SAMPLE/PRELOAD
RESERVED
Code
0000000000000000
1111111111111111
0010001000100010
0100010001000100
0011001100110011
0001000100010001
0101010101010101, 0111011101110111,
Description
Forces contents of the boundary scan cells onto the device outputs (1) .
Places the boundary scan register (BSR) between TDI and TDO.
Places the bypass register (BYR) between TDI and TDO.
Loads the ID register (IDR) with the vendor ID code and places the
register between TDI and TDO.
Places the bypass register (BYR) between TDI and TDO. Forces all
device output drivers except INT x to a High-Z state.
Uses BYR. Forces contents of the boundary scan cells onto the device
outputs. Places the bypass register (BYR) between TDI and TDO.
Places the boundary scan register (BSR) between TDI and TDO.
SAMPLE allows data from device inputs (2) to be captured in the
boundary scan cells and shifted serially through TDO. PRELOAD allows
data to be input serially into the boundary scan cells via the TDI.
Several combinations are reserved. Do not use codes other than those
1000100010001000, 1001100110011001, identified above.
1010101010101010, 1011101110111011,
1100110011001100
PRIVATE
0110011001100110,1110111011101110,
For internal use only.
1101110111011101
5682 tbl 18
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS, and TRST .
3. The Boundary Scan Descriptive Language (BSDL) file for this device is available on the IDT website (www.idt.com), or by contacting your local
IDT sales representative.
6.42
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