参数资料
型号: IDT71T75602S100BG8
厂商: IDT, Integrated Device Technology Inc
文件页数: 21/23页
文件大小: 0K
描述: IC SRAM 18MBIT 100MHZ 119BGA
标准包装: 1,000
格式 - 存储器: RAM
存储器类型: SRAM - 同步 ZBT
存储容量: 18M(512K x 36)
速度: 100MHz
接口: 并联
电源电压: 2.375 V ~ 2.625 V
工作温度: 0°C ~ 70°C
封装/外壳: 119-BGA
供应商设备封装: 119-PBGA(14x22)
包装: 带卷 (TR)
其它名称: 71T75602S100BG8
IDT71T75602, IDT71T75802, 512K x 36, 1M x 18, 2.5V Synchronous ZBT? SRAMs with
2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
JTAG Identification Register Definitions
Instruction Field
Revision Number (31:28)
IDT Device ID (27:12)
IDT JEDEC ID (11:1)
ID Register Indicator Bit (Bit 0)
Value
0x2
0x220, 0x222
0x33
1
Description
Reserved for version number.
Define s IDT part number 71T75602 and 71T75802, respectively.
Allows unique identification of device vendor as IDT.
Indicates the presence of an ID register.
I5313 tbl 02
Available JTAG Instructions
Instruction
EXTEST
SAMPLE/PRELOAD
DEVICE_ID
HIGHZ
RESERVED
RESERVED
RESERVED
RESERVED
CLAMP
RESERVED
RESERVED
RESERVED
RESERVED
VALIDATE
RESERVED
BYPASS
Description
Forces contents of the bound ary scan cells onto the device outputs (1) .
Places the boundary scan registe r (BSR) between TDI and TDO.
Places the boundary scan registe r (BSR) between TDI and TDO.
SAMPLE allows data from device inputs (2) and outputs (1) to be captured
in the boundary scan cells and shifted serially through TDO. PRELOAD
allows data to be input serially into the bo undary scan cells via the TDI.
Loads the JTAG ID register (JIDR) with the vendor ID code and places
the register between TDI and TDO.
Places the bypass register (BYR) be tween TDI and TDO. Forces all
device o utput drivers to a High-Z state.
Several combinations are reserved. Do not use codes other than those
identified for EXTEST, SAMPLE/PRELOAD, DEVICE_ID, HIGHZ, CLAMP,
VALIDATE and BYPASS instructions.
Uses BYR. Forces contents of the bound ary scan cells onto the device
outputs. Places the byp ass registe r (BYR) between TDI and TDO.
Same as above.
Automatically loaded into the instruction register whenever the TAP
controller passes through the CAPTURE-IR state. The lower two bits '01'
are mand ated by the IEEE std. 1149.1 specification.
Same as above.
The BYPASS instruction is used to truncate the boundary scan register
as a single bit in length.
OPCODE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
I5313 tbl 04
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS, and TRST .
21
6.42
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IDT71T75602S100BGG 功能描述:IC SRAM 18MBIT 100MHZ 119BGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:45 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口,异步 存储容量:128K(8K x 16) 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP(14x14) 包装:托盘 其它名称:70V25S15PF
IDT71T75602S100BGG8 功能描述:IC SRAM 18MBIT 100MHZ 119BGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:45 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口,异步 存储容量:128K(8K x 16) 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP(14x14) 包装:托盘 其它名称:70V25S15PF
IDT71T75602S100BGGI 功能描述:IC SRAM 18MBIT 100MHZ 119BGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口,同步 存储容量:1.125M(32K x 36) 速度:5ns 接口:并联 电源电压:3.15 V ~ 3.45 V 工作温度:-40°C ~ 85°C 封装/外壳:256-LBGA 供应商设备封装:256-CABGA(17x17) 包装:带卷 (TR) 其它名称:70V3579S5BCI8
IDT71T75602S100BGGI8 功能描述:IC SRAM 18MBIT 100MHZ 119BGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:45 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口,异步 存储容量:128K(8K x 16) 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP(14x14) 包装:托盘 其它名称:70V25S15PF
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