参数资料
型号: IDT71V65903S85PF
厂商: IDT, Integrated Device Technology Inc
文件页数: 6/26页
文件大小: 0K
描述: IC SRAM 9MBIT 85NS 100TQFP
标准包装: 72
格式 - 存储器: RAM
存储器类型: SRAM - 同步 ZBT
存储容量: 9M(512K x 18)
速度: 85ns
接口: 并联
电源电压: 3.135 V ~ 3.465 V
工作温度: 0°C ~ 70°C
封装/外壳: 100-LQFP
供应商设备封装: 100-TQFP(14x14)
包装: 托盘
其它名称: 71V65903S85PF
IDT71V65703, IDT71V65903, 256K x 36, 512K x 18, 3.3V Synchronous ZBT? SRAMs with
3.3V I/O, Burst Counter, and Flow-Through Outputs Commercial and Industrial Temperature Ranges
Pin Configuration ? 512K x 18
Absolute Maximum Ratings (1)
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
Symbol
V TERM (2)
Rating
Terminal Voltage with
Respect to GND
Commercial &
Industrial
-0.5 to +4.6
Unit
V
NC
NC
1
2
80
79
A 10
NC
V TERM (3,6)
Terminal Voltage with
-0.5 to V DD
V
NC
V DDQ
3
4
78
77
NC
V DDQ
Respect to GND
V SS
NC
NC
I/O 8
I/O 9
V SS
V DDQ
5
6
7
8
9
10
11
76
75
74
73
72
71
70
V SS
NC
I/O P1
I/O 7
I/O 6
V SS
V DDQ
V TERM (4,6)
V TERM (5,6)
Terminal Voltage with
Respect to GND
Terminal Voltage with
Respect to GND
-0.5 to V DD +0.5
-0.5 to V DDQ +0.5
V
V
I/O 10
I/O 11
12
13
69
68
I/O 5
I/O 4
Commercial
0 to +70
o
C
V SS (1)
V DD
V DD (2)
V SS
I/O 12
14
15
16
17
18
67
66
65
64
63
V SS
V SS (1)
V DD
ZZ
I/O 3
T A (7)
T BIAS
Industrial
Temperature Under Bias
-40 to +85
-55 to +125
o
o
C
C
I/O 13
19
62
I/O 2
V DDQ
20
61
V DDQ
T STG
Storage Temperature
-55 to +125
o
C
V SS
21
60
V SS
I/O 14
I/O 15
I/O P2
NC
22
23
24
25
59
58
57
56
I/O 1
I/O 0
NC
NC
P T
I OUT
Power Dissipation
DC Output Current
2.0
50
W
mA
V SS
26
55
V SS
V DDQ
NC
NC
27
28
29
54
53
52
V DDQ
NC
NC
, NOTES:
5298 tbl 06
NC
30
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
51
NC
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
5298 drw 02a
Top View
100 TQFP
NOTES:
1. Pins 14 and 66 do not have to be connected directly to V SS as long as the
input voltage is < V IL .
2. Pin 16 does not have to be connected directly to V DD as long as the input
voltage is > V IH .
3. Pin 84 is reserved for a future 16M.
4. DNU = Do not use. Pins 38, 39, 42 and 43 are reserved for respective
JTAG pins: TMS, TDI, TDO and TCK. The current die revision allows
these pins to be left unconnected, tied LOW (V SS ), or tied HIGH (V DD ).
100 TQFP Capacitance (1)
(T A = +25 ° C, f = 1.0MHz)
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V DD terminals only.
3. V DDQ terminals only.
4. Input terminals only.
5. I/O terminals only.
6. This is a steady-state DC parameter that applies after the power supply has
reached its nominal operating value. Power sequencing is not necessary;
however, the voltage on any input or I/O pin cannot exceed V DDQ during power
supply ramp up.
7. T A is the “instant on” case temperature.
119 BGA Capacitance (1)
(T A = +25 ° C, f = 1.0MHz)
Symbol
C IN
C I/O
Parameter (1)
Input Capacitance
I/O Capacitance
Conditions
V IN = 3dV
V OUT = 3dV
Max.
5
7
Unit
pF
pF
Symbol
C IN
C I/O
Parameter (1)
Input Capacitance
I/O Capacitance
Conditions
V IN = 3dV
V OUT = 3dV
Max.
7
7
Unit
pF
pF
165 fBGA Capacitance (1)
(T A = +25 ° C, f = 1.0MHz)
5298 tbl 07
5298 tbl 07a
Symbol
C IN
C I/O
Parameter (1)
Input Capacitance
I/O Capacitance
Conditions
V IN = 3dV
V OUT = 3dV
Max.
TBD
TBD
Unit
pF
pF
NOTE:
5298 tbl 07b
1. This parameter is guaranteed by device characterization, but not production tested.
6.42
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