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参数资料
| 型号： | IDT72285L10TFG |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 1/25页 |
| 文件大小： | 0K |
| 描述： | IC FIFO 65536X18 LP 10NS 64STQFP |
| 标准包装： | 80 |
| 系列： | 7200 |
| 功能： | 同步 |
| 存储容量： | 1.1M（65K x 18） |
| 访问时间： | 10ns |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-TQFP（10x10） |
| 包装： | 托盘 |
| 其它名称： | 72285L10TFG |
1
2013
Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-4674/6
AUGUST 2013
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The SuperSync FIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
CMOS SuperSync FIFO
32,768 x 18
65,536 x 18
IDT72275
IDT72285
FEATURES:
Choose among the following memory organizations:
IDT72275 — 32,768 x 18
IDT72285 — 65,536 x 18
Pin-compatible with the IDT72255LA/72265LA SuperSync FIFOs
10ns read/write cycle time (6.5ns access time)
Fixed, low first word data latency time
Auto power down minimizes standby power consumption
Master Reset clears entire FIFO
Partial Reset clears data, but retains programmable
settings
Retransmit operation with fixed, low first word data
latency time
Empty, Full and Half-Full flags signal FIFO status
Programmable Almost-Empty and Almost-Full flags, each flag
can default to one of two preselected offsets
Program partial flags by either serial or parallel means
Select IDT Standard timing (using EF and FF flags) or First
Word Fall Through timing (using OR and IR flags)
Output enable puts data outputs into high impedance state
Easily expandable in depth and width
Independent Read and Write Clocks (permit reading and writing
simultaneously)
Available in the 64-pin Thin Quad Flat Pack (TQFP) and the 64-
pin Slim Thin Quad Flat Pack (STQFP)
High-performance submicron CMOS technology
Industrial temperature range (-40
°°°°°C to +85°°°°°C) is available
DESCRIPTION:
TheIDT72275/72285areexceptionallydeep,highspeed,CMOSFirst-In-
First-Out(FIFO)memorieswithclockedreadandwritecontrols. TheseFIFOs
offernumerousimprovementsoverpreviousSuperSyncFIFOs,includingthe
following:
Thelimitationofthefrequencyofoneclockinputwithrespecttotheotherhas
been removed. The Frequency Select pin (FS) has been removed, thus
it is no longer necessary to select which of the two clock inputs, RCLK or
WCLK, is running at the higher frequency.
The period required by the retransmit operation is now fixed and short.
Thefirstworddatalatencyperiod,fromthetimethefirstwordiswrittentoan
emptyFIFOtothetimeitcanberead,isnowfixedandshort. (Thevariable
clock cycle counting delay associated with the latency period found on
previousSuperSyncdeviceshasbeeneliminatedonthisSuperSyncfamily.)
FUNCTIONAL BLOCK DIAGRAM
INPUT REGISTER
OUTPUT REGISTER
RAM ARRAY
32,768 x 18
65,536 x 18
FLAG
LOGIC
FF/IR
PAF
EF/OR
PAE
HF
READ POINTER
READ
CONTROL
LOGIC
WRITE CONTROL
LOGIC
WRITE POINTER
RESET
LOGIC
WEN
WCLK
D0 -D17
LD
MRS
REN
RCLK
OE
Q0 -Q17
OFFSET REGISTER
PRS
FWFT/SI
SEN
RT
4674 drw 01
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| IDT72285L15PF | 功能描述:IC FIFO 65536X18 LP 15NS 64-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72285L15PF8 | 功能描述:IC FIFO 65536X18 LP 15NS 64-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72285L15PFGI | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO 65536X18 LP 15NS 64-TQFP |
| IDT72285L15PFGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO 65536X18 LP 15NS 64-TQFP |
| IDT72285L15PFI | 功能描述:IC FIFO 65536X18 LP 15NS 64-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
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