- 您现在的位置：买卖IC网 > PDF目录9898 > IDT72T36105L5BB (IDT, Integrated Device Technology Inc)IC FIFO 131X18 5NS 240BGA PDF资料下载
参数资料
| 型号： | IDT72T36105L5BB |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 8/57页 |
| 文件大小： | 0K |
| 描述： | IC FIFO 131X18 5NS 240BGA |
| 标准包装： | 1 |
| 系列： | 72T |
| 功能： | 异步，同步 |
| 存储容量： | 2.3K（131 x 18） |
| 数据速率： | 83MHz |
| 访问时间： | 5ns |
| 电源电压： | 2.375 V ~ 2.625 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 240-BGA |
| 供应商设备封装： | 240-PBGA（19x19） |
| 包装： | 托盘 |
| 其它名称： | 72T36105L5BB |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页
16
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72T3645/55/65/75/85/95/105/115/125 2.5V TeraSync
36-BIT FIFO
1K x 36, 2K x 36, 4K x 36, 8K x 36, 16K x 36, 32K x 36, 64K x 36, 128K x 36 and 256K x 36
FEBRUARY 4, 2009
FUNCTIONALDESCRIPTION
TIMING MODES: IDT STANDARD vs FIRST WORD FALL THROUGH
(FWFT) MODE
The IDT72T3645/55/65/75/85/95/105/115/125 support two different tim-
ing modes of operation: IDT Standard mode or First Word Fall Through
(FWFT) mode. The selection of which mode will operate is determined during
Master Reset, by the state of the FWFT/SI input.
If, at the time of Master Reset, FWFT/SI is LOW, then IDT Standard mode
willbeselected.ThismodeusestheEmptyFlag (
EF)toindicatewhetherornot
there are any words present in the FIFO. It also uses the Full Flag function (
FF)
to indicate whether or not the FIFO has any free space for writing. In IDT
Standard mode, every word read from the FIFO, including the first, must be
requested using the Read Enable (
REN) and RCLK.
If, at the time of Master Reset, FWFT/SI is HIGH, then FWFT mode will be
selected. This mode uses Output Ready (
OR)toindicatewhetherornotthere
is valid data at the data outputs (Qn). It also uses Input Ready (
IR) to indicate
whether or not the FIFO has any free space for writing. In the FWFT mode, the
first word written to an empty FIFO goes directly to Qn after three RCLK rising
edges,
REN = LOW is not necessary. Subsequent words must be accessed
using the Read Enable (
REN) and RCLK.
Varioussignals,bothinputandoutputsignalsoperatedifferentlydepending
on which timing mode is in effect.
IDT STANDARD MODE
In this mode, the status flags,
FF, PAF, HF, PAE, and EF operate in the
manner outlined in Table 3. To write data into to the FIFO, Write Enable (
WEN)
mustbeLOW.DatapresentedtotheDATAINlineswillbeclockedintotheFIFO
on subsequent transitions of the Write Clock (WCLK). After the first write is
performed, the Empty Flag (
EF)willgoHIGH.Subsequentwriteswillcontinue
to fill up the FIFO. The Programmable Almost-Empty flag (
PAE)willgoHIGH
after n + 1 words have been loaded into the FIFO, where n is the empty offset
value. The default setting for these values are stated in the footnote of Table 2.
Thisparameterisalsouserprogrammable.SeesectiononProgrammableFlag
OffsetLoading.
If one continued to write data into the FIFO, and we assumed no read
operationsweretakingplace,theHalf-Fullflag(
HF)wouldtoggletoLOWonce
the 513rd word for IDT72T3645, 1,025th word for IDT72T3655, 2,049th word
for IDT72T3665, 4,097th word for IDT72T3675, 8,193th word for the
IDT72T3685, 16,385th word for the IDT72T3695, 32,769th word for the
IDT72T36105, 65,537th word for the IDT72T36115 and 131,073rd word for
the IDT72T36125, respectively was written into the FIFO. Continuing to write
data into the FIFO will cause the Programmable Almost-Full flag (
PAF) to go
LOW. Again, if no reads are performed, the
PAF will go LOW after (1,024-m)
writes for the IDT72T3645, (2,048-m) writes for the IDT72T3655, (4,096-m)
writes for the IDT72T3665, (8,192-m) writes for the IDT72T3675, (16,384-m)
writes for the IDT72T3685, (32,768-m) writes for the IDT72T3695, (65,536-m)
writes for the IDT72T36105, (131,072-m) writes for the IDT72T36115 and
(262,144-m) writes for the IDT72T36125. The offset “m” is the full offset value.
The default setting for these values are stated in the footnote of Table 2. This
parameter is also user programmable. See section on Programmable Flag
OffsetLoading.
When the FIFO is full, the Full Flag (
FF)willgoLOW,inhibitingfurtherwrite
operations.Ifnoreadsareperformedafterareset,
FFwillgoLOWafterDwrites
to the FIFO. D = 1,024 writes for the IDT72T3645, 2,048 writes for the
IDT72T3655,4,096writesfortheIDT72T3665,8,192writesfortheIDT72T3675,
16,384 writes for the IDT72T3685, 32,768 writes for the IDT72T3695, 65,536
writesfortheIDT72T36105,131,072writesfortheIDT72T36115and262,144
writes for the IDT72T36125, respectively.
If the FIFO is full, the first read operation will cause
FF to go HIGH.
Subsequentreadoperationswillcause
PAFandHFtogoHIGHattheconditions
described in Table 3. If further read operations occur, without write operations,
PAE will go LOW when there are n words in the FIFO, where n is the empty
offsetvalue.ContinuingreadoperationswillcausetheFIFOtobecomeempty.
When the last word has been read from the FIFO, the
EFwillgoLOWinhibiting
further read operations.
REN is ignored when the FIFO is empty.
When configured in IDT Standard mode, the
EFandFFoutputsaredouble
register-bufferedoutputs.
Relevant timing diagrams for IDT Standard mode can be found in Figure
11, 12, 13 and 18.
FIRST WORD FALL THROUGH MODE (FWFT)
In this mode, the status flags,
IR, PAF, HF, PAE, and OR operate in the
manner outlined in Table 4. To write data into to the FIFO,
WENmustbeLOW.
DatapresentedtotheDATAINlineswillbeclockedintotheFIFOonsubsequent
transitions of WCLK. After the first write is performed, the Output Ready (
OR)
flag will go LOW. Subsequent writes will continue to fill up the FIFO.
PAEwillgo
HIGH after n + 2 words have been loaded into the FIFO, where n is the empty
offset value. The default setting for these values are stated in the footnote of
Table 2. This parameter is also user programmable. See section on Program-
mable Flag Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operationsweretakingplace,the
HFwouldtoggletoLOWoncethe514thword
for the IDT72T3645, 1,026th word for the IDT72T3655, 2,050th word for the
IDT72T3665, 4,098th word for the IDT72T3675, 8,194th word for the
IDT72T3685, 16,386th word for the IDT72T3695, 32,770th word for the
IDT72T36105, 65,538th word for the IDT72T36115 and 131,074th word for
the IDT72T36125, respectively was written into the FIFO. Continuing to write
data into the FIFO will cause the
PAF to go LOW. Again, if no reads are
performed, the
PAF will goLOW after (1,025-m) writes for the IDT72T3645,
(2,049-m) writes for the IDT72T3655, (4,097-m) writes for the IDT72T3665
and(8,193-m)writesfortheIDT72T3675,(16,385-m)writesfortheIDT72T3685,
(32,769-m)writesfortheIDT72T3695,(65,537-m)writesfortheIDT72T36105,
(131,073-m) writes for the IDT72T36115 and (262,145-m) writes for the
IDT72T36125,wheremisthefulloffsetvalue.Thedefaultsettingforthesevalues
are stated in the footnote of Table 2.
WhentheFIFOisfull,theInputReady(
IR)flagwillgoHIGH,inhibitingfurther
write operations. If no reads are performed after a reset,
IR will go HIGH after
D writes to the FIFO. D = 1,025 writes for the IDT72T3645, 2,049 writes for
the IDT72T3655, 4,097 writes for the IDT72T3665 and 8,193 writes for the
IDT72T3675,16,385 writes for the IDT72T3685, 32,769 writes for the
IDT72T3695, 65,537 writes for the IDT72T36105, 131,073 writes for the
IDT72T36115 and 262,145 writes for the IDT72T36125, respectively. Note
thattheadditionalwordinFWFTmodeisduetothecapacityofthememoryplus
outputregister.
If the FIFO is full, the first read operation will cause the
IR flag to go LOW.
Subsequent read operations will cause the
PAF and HF to go HIGH at the
conditions described in Table 4. If further read operations occur, without write
operations,the
PAEwillgoLOWwhentherearen+1wordsintheFIFO,where
n is the empty offset value. Continuing read operations will cause the FIFO to
become empty. When the last word has been read from the FIFO,
OR will go
HIGHinhibitingfurtherreadoperations.
RENisignoredwhentheFIFOisempty.
When configured in FWFT mode, the
OR flag output is triple register-
buffered, and the
IRflag output is double register-buffered.
Relevant timing diagrams for FWFT mode can be found in Figure 14, 15,
16 and 19.
相关PDF资料 |
PDF描述 |
|---|---|
| MAX111ACAP+T | IC ADC 14BIT 2CH 5V 20-SSOP |
| IDT72T18105L5BB | IC FIFO 131X18 2.5V 5NS 240BGA |
| D38999/24WF32SB | CONN RCPT 32POS JAM NUT W/SCKT |
| MAX1309ECM/V+T | IC ADC 12BIT 4CH 2800KSPS 48LQFP |
| MAX1309ECM+T | IC ADC 12BIT 4CH 2.8MSPS 48LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT72T36105L5BBI | 功能描述:IC FIFO 131X18 5NS 240BGA RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72T 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72T36105L6-7BB | 功能描述:IC FIFO 131X18 6-7NS 240BGA RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72T 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72T36115L10BB | 功能描述:IC FIFO 131KX36 10NS 240BGA RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72T 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72T36115L4-4BB | 功能描述:IC FIFO 131KX36 4-4NS 240BGA RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72T 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72T36115L4-4BBG | 功能描述:IC FIFO 131072X18 SYNC 240BGA RoHS:是 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72T 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
发布紧急采购，3分钟左右您将得到回复。