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参数资料
| 型号： | IDT72V2105L15PF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 25/26页 |
| 文件大小： | 0K |
| 描述： | IC FIFO SUPERSYNCII 15NS 64-TQFP |
| 标准包装： | 45 |
| 系列： | 72V |
| 功能： | 同步 |
| 存储容量： | 4.7Mb（262k x 18） |
| 访问时间： | 15ns |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-TQFP（14x14） |
| 包装： | 托盘 |
| 其它名称： | 72V2105L15PF |
8
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT72V295/72V2105 3.3V HIGH DENSITY CMOS
SUPERSYNC FIFOTM 131,072 x 18, 262,144 x 18
Number of
Words in
FIFO
0
1 to n (1)
(n+1) to 65,536
65,537 to (131,072-(m+1))
(131,072-m) (2) to 131,071
131,072
0
1 to n (1)
(n+1) to 131,072
131,073 to (262,144-(m+1))
(262,144-m) (2) to 262,143
262,144
TABLE II
STATUS FLAGS FOR FWFT MODE
IDT72V295
IDT72V2105
FF PAF HF PAE EF
HH
HL
L
HH
HL
H
HH
H
HH
L
H
HL
L
H
LL
LH
H
TABLE I
STATUS FLAGS FOR IDT STANDARD MODE
4668 drw 05
0
1 to n+1(1)
(n+2) to 65,537
(131,073-m)
(2)
to 131,072
131,073
0
1 to n+1(1)
(n+2) to 131,073
131,074 to (262,145-(m+1))
(262,145-m)
(2)
to 262,144
262,145
IR PAF HF PAE OR
LH
H
L
H
LH
H
L
H
HHL
LH
L
H
L
LLL
H
L
HL
L
H
L
IDT72V295
IDT72V2105
Number of
Words in
FIFO
(
1)
65,538 to (131,073-(m+1))
NOTES:
1. n = Empty Offset, Default Values: n = 127 when parallel offset loading is selected or n = 1,023 when serial offset loading is selected.
2. m = Full Offset, Default Values: m = 127 when parallel offset loading is selected or m = 1,023 when serial offset loading is selected.
NOTES:
1. n = Empty Offset, Default Values: n = 127 when parallel offset loading is selected or n = 1,023 when serial offset loading is selected.
2. m = Full Offset, Default Values: m = 127 when parallel offset loading is selected or m = 1,023 when serial offset loading is selected.
PROGRAMMING FLAG OFFSETS
Full and Empty Flag offset values are user programmable. The
IDT72V295/72V2105 has internal registers for these offsets. Default set-
tings are stated in the footnotes of Table 1 and Table 2. Offset values can
be programmed into the FIFO in one of two ways; serial or parallel loading
method. The selection of the loading method is done using the
LD (Load)
pin. During Master Reset, the state of the
LDinput determines whether serial
or parallel flag offset programming is enabled. A HIGH on
LDduring Master
Reset selects serial loading of offset values and in addition, sets a default
PAE offset value of 3FFH (a threshold 1,023 words from the empty
boundary), and a default
PAFoffset value of 3FFH (a threshold 1,023 words
from the full boundary). A LOW on
LD during Master Reset selects parallel
loading of offset values, and in addition, sets a default
PAE offset value of
07FH (a threshold 127 words from the empty boundary), and a default
PAF
offset value of 07FH (a threshold 127 words from the full boundary). See
Figure 3, Offset Register Location and Default Values.
In addition to loading offset values into the FIFO, it also possible to read
the current offset values. It is only possible to read offset values via parallel
read.
Figure 4, Programmable Flag Offset Programming Sequence, summa-
rizes the control pins and sequence for both serial and parallel programming
modes. For a more detailed description, see discussion that follows.
The offset registers may be programmed (and reprogrammed) any time
after Master Reset, regardless of whether serial or parallel programming
has been selected.
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| IDT72V2105L15PF8 | 功能描述:IC FIFO SUPERSYNCII 15NS 64-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72V2105L15PFGI | 功能描述:IC FIFO SUPERSYNCII 15NS 64-TQFP RoHS:是 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72V2105L15PFGI8 | 功能描述:IC FIFO SUPERSYNCII 15NS 64-TQFP RoHS:是 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72V2105L15PFI | 功能描述:IC FIFO SUPERSYNCII 15NS 64-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT72V2105L15PFI8 | 功能描述:IC FIFO SUPERSYNCII 15NS 64-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
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