- 您现在的位置：买卖IC网 > PDF目录10047 > IDT72V233L6PF8 (IDT, Integrated Device Technology Inc)IC FIFO 1024X18 6NS 80QFP PDF资料下载
参数资料
| 型号： | IDT72V233L6PF8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 4/45页 |
| 文件大小： | 0K |
| 描述： | IC FIFO 1024X18 6NS 80QFP |
| 标准包装： | 750 |
| 系列： | 72V |
| 功能： | 异步，同步 |
| 存储容量： | 18.4K（1K x 18） |
| 数据速率： | 166MHz |
| 访问时间： | 4ns |
| 电源电压： | 3.15 V ~ 3.45 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-TQFP（14x14） |
| 包装： | 带卷 (TR) |
| 其它名称： | 72V233L6PF8 |
第1页第2页第3页当前第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页
12
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V223/233/243/253/263/273/283/293 3.3V HIGH DENSITY SUPERSYNC IITM NARROW BUS FIFO
512 x 18, 1K x 9/18, 2K x 9/18, 4K x 9/18, 8K x 9/18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9
FEBRUARY 11, 2009
FUNCTIONALDESCRIPTION
TIMING MODES: IDT STANDARD vs FIRST WORD FALL THROUGH
(FWFT) MODE
The IDT72V223/72V233/72V243/72V253/72V263/72V273/72V283/
72V293 support two different timing modes of operation: IDT Standard mode
or First Word Fall Through (FWFT) mode. The selection of which mode will
operate is determined during Master Reset, by the state of the FWFT/SI input.
If, at the time of Master Reset, FWFT/SI is LOW, then IDT Standard mode
will be selected. This mode uses the Empty Flag (
EF) to indicate whether or
not there are any words present in the FIFO. It also uses the Full Flag function
(
FF) to indicate whether or not the FIFO has any free space for writing. In IDT
Standard mode, every word read from the FIFO, including the first, must be
requested using the Read Enable (
REN) and RCLK.
If, at the time of Master Reset, FWFT/SI is HIGH, then FWFT mode will be
selected. This mode uses Output Ready (
OR)toindicatewhetherornotthere
is valid data at the data outputs (Qn). It also uses Input Ready (
IR) to indicate
whether or not the FIFO has any free space for writing. In the FWFT mode,
thefirstwordwrittentoanemptyFIFOgoesdirectlytoQnafterthreeRCLKrising
edges,
REN = LOW is not necessary. Subsequent words must be accessed
using the Read Enable (
REN) and RCLK.
Varioussignals,bothinputandoutputsignalsoperatedifferentlydepending
on which timing mode is in effect.
IDT STANDARD MODE
In this mode, the status flags,
FF, PAF, HF, PAE, and EF operate in the
manner outlined in Table 3. To write data into to the FIFO, Write Enable (
WEN)
mustbeLOW.DatapresentedtotheDATAINlineswillbeclockedintotheFIFO
on subsequent transitions of the Write Clock (WCLK). After the first write is
performed, the Empty Flag (
EF)willgoHIGH.Subsequentwriteswillcontinue
to fill up the FIFO. The Programmable Almost-Empty flag (
PAE)willgoHIGH
after n + 1 words have been loaded into the FIFO, where n is the empty offset
value. The default setting for these values are stated in the footnote of Table 2.
Thisparameterisalsouserprogrammable.SeesectiononProgrammableFlag
OffsetLoading.
If one continued to write data into the FIFO, and we assumed no read
operationsweretakingplace,theHalf-Fullflag(
HF)wouldtoggletoLOWonce
(D/2 + 1) words were written into the FIFO. If x18 Input or x18 Output bus Width
is selected, (D/2 + 1) = the 257th word for the IDT72V223, 513rd word for
IDT72V233,1,025thwordfortheIDT72V243,2,049thwordfortheIDT72V253,
4,097th word for the IDT72V263, 8,193th word for IDT72V273, 16,385th word
for the IDT72V283 and 32,769th word for the IDT72V293. If both x9 Input and
x9 Output bus Widths are selected, (D/2 + 1) = the 513rd word for the
IDT72V223, 1,025th word for IDT72V233, 2,049th word for the IDT72V243,
4,097th word for the IDT72V253, 8,193rd word for the IDT72V263, 16,385th
word for IDT72V273, 32,769th word for the IDT72V283 and 65,537th word
for the IDT72V293. Continuing to write data into the FIFO will cause the
Programmable Almost-Full flag (
PAF) to go LOW. Again, if no reads are
performed, the
PAFwillgoLOWafter(D-m)writestotheFIFO.Ifx18Inputor
x18 Output bus Width is selected, (D-m) = (512-m) writes for the IDT72V223,
(1,024-m) writes for the IDT72V233, (2,048-m) writes for the IDT72V243 and
(4,096-m) writes for the IDT72V253, (8,192-m) writes for the IDT72V263,
(16,384-m) writes for the IDT72V273, (32,768-m) writes for the IDT72V283
and (65,536-m) writes for the IDT72V293. If both x9 Input and x9 Output bus
Widths are selected, (D-m) = (1,024-m) writes for the IDT72V223, (2,048-m)
writes for the IDT72V233, (4,096-m) writes for the IDT72V243, (8,192-m)
writes for the IDT72V253, (16,384-m) writes for the IDT72V263, (32,768-m)
writesfortheIDT72V273,(65,536-m)writesfortheIDT72V283and(131,072-m)
writesfortheIDT72V293.Theoffset“m”isthefulloffsetvalue.Thedefaultsetting
forthesevaluesarestatedinthefootnoteofTable2.Thisparameterisalsouser
programmable. See section on Programmable Flag Offset Loading.
When the FIFO is full, the Full Flag (
FF)willgoLOW,inhibitingfurtherwrite
operations.Ifnoreadsareperformedafterareset,
FFwillgoLOWafterDwrites
to the FIFO. If the x18 Input or x18 Output bus Width is selected, D = 512 writes
for the IDT72V223, 1,024 writes for the IDT72V233, 2,048 writes for the
IDT72V243, 4,096 writes for the IDT72V253, 8,192 writes for the IDT72V263,
16,384 writes for the IDT72V273, 32,768 writes for the IDT72V283 and 65,536
writesfortheIDT72V293.Ifbothx9Inputandx9OutputbusWidthsareselected,
D = 1024 writes for the IDT72V223, 2,048 writes for the IDT72V233, 4,096
writes for the IDT72V243, 8,192 writes for the IDT72V253, 16,384 writes for
the IDT72V263, 32,768 writes for the IDT72V273, 65,536 writes for the
IDT72V283 and 131,072 writes for the IDT72V293, respectively.
If the FIFO is full, the first read operation will cause
FF to go HIGH.
Subsequentreadoperationswillcause
PAFandHFtogoHIGHattheconditions
described in Table 3. If further read operations occur, without write operations,
PAE will go LOW when there are n words in the FIFO, where n is the empty
offsetvalue.ContinuingreadoperationswillcausetheFIFOtobecomeempty.
When the last word has been read from the FIFO, the
EFwillgoLOWinhibiting
further read operations.
REN is ignored when the FIFO is empty.
When configured in IDT Standard mode, the
EFandFFoutputsaredouble
register-bufferedoutputs.
Relevant timing diagrams for IDT Standard mode can be found in Figure
7, 8 and 11.
FIRST WORD FALL THROUGH MODE (FWFT)
In this mode, the status flags,
IR, PAF, HF, PAE, and OR operate in the
manner outlined in Table 4. To write data into the FIFO,
WEN must be LOW.
DatapresentedtotheDATAINlineswillbeclockedintotheFIFOonsubsequent
transitions of WCLK. After the first write is performed, the Output Ready (
OR)
flag will go LOW. Subsequent writes will continue to fill up the FIFO.
PAEwillgo
HIGH after n+2 words have been loaded into the FIFO, where n is the empty
offsetvalue.ThedefaultsettingforthesevaluesarestatedinthefootnoteofTable
2. This parameter is also user programmable. See section on Programmable
Flag Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the
HF would toggle to LOW once the (D/2 + 2)
wordswerewrittenintotheFIFO.Ifx18Inputorx18OutputbusWidthisselected,
(D/2 + 2) = the 258th word for the IDT72V223, 514th word for IDT72V233,
1,026th word for the IDT72V243, 2,050th word for the IDT72V253, 4,098th
word for the IDT72V263, 8,194th word for IDT72V273, 16,386th word for the
IDT72V283 and 32,770th word for the IDT72V293. If both x9 Input and x9
OutputbusWidthsareselected,(D/2 + 2) = the514thwordfortheIDT72V223,
1,026th word for IDT72V233, 2,050th word for the IDT72V243, 4,098th word
for the IDT72V253, 8,194th word for the IDT72V263, 16,386th word for
IDT72V273, 32,770th word for the IDT72V283 and 65,538th word for the
IDT72V293.ContinuingtowritedataintotheFIFOwillcausethe
PAFtogoLOW.
Again, if no reads are performed, the
PAFwillgoLOWafter(D-m)writestothe
FIFO. If x18 Input or x18 Output bus Width is selected, (D-m) = (513-m) writes
for the IDT72V223, (1,025-m) writes for the IDT72V233, (2,049-m) writes for
the IDT72V243, (4,097-m) writes for the IDT72V253, (8,193-m) writes for the
IDT72V263, (16,385-m) writes for the IDT72V273, (32,769-m) writes for the
IDT72V283 and (65,537-m) writes for the IDT72V293. If both x9 Input and x9
Output bus Widths are selected, (D-m) = (1,025-m) writes for the IDT72V223,
(2,049-m) writes for the IDT72V233, (4,097-m) writes for the IDT72V243,
(8,193-m) writes for the IDT72V253, (16,385-m) writes for the IDT72V263,
相关PDF资料 |
PDF描述 |
|---|---|
| MS27508E12B8PA | CONN RCPT 8POS BOX MNT W/PINS |
| MS3106E28-21PY | CONN PLUG 37POS STRAIGHT W/PINS |
| AD7872ANZ | IC ADC 14BIT SAMPLING 16DIP |
| AD676KNZ | IC ADC 16BIT 100KSPS 28-DIP |
| MS3106E28-21PW | CONN PLUG 37POS STRAIGHT W/PINS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT72V233L7-5BC | 功能描述:IC FIFO 1024X18 7-5NS 100BGA RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V233L7-5BCI | 功能描述:IC FIFO 1024X18 7-5NS 100BGA RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V233L7-5PF | 功能描述:IC FIFO 1024X18 7-5NS 80QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V233L7-5PF8 | 功能描述:IC FIFO 1024X18 7-5NS 80QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V233L7-5PFI | 功能描述:IC FIFO 1024X18 7-5NS 80QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
发布紧急采购，3分钟左右您将得到回复。