参数资料
型号: IDT72V51446L7-5BBI
厂商: IDT, Integrated Device Technology Inc
文件页数: 4/57页
文件大小: 0K
描述: IC FLOW CTRL MULTI QUEUE 256-BGA
标准包装: 1
类型: 多队列流量控制
安装类型: 表面贴装
封装/外壳: 256-BBGA
供应商设备封装: 256-BGA(17x17)
包装: 托盘
其它名称: 72V51446L7-5BBI
12
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT72V51436/72V51446/72V51456 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(16 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
PIN DESCRIPTIONS (CONTINUED)
NOTES:
1. Inputs should not change after Master Reset.
2. These pins are for the JTAG port. Please refer to pages 52-56 and Figures 33-35.
Symbol
Name
I/O TYPE
Description
WEN
WriteEnable
LVTTL
The
WENinputenableswriteoperationstoaselectedqueuebasedonarisingedgeofWCLK.Aqueue
INPUT
to be written to can be selected via WCLK, WADEN and the WRADD address bus regardless of the state
of
WEN. Data present on Din can be written to a newly selected queue on the second WCLK cycle after
queue selection provided that
WENisLOW.AwriteenableisnotrequiredtocyclethePAFnbus(inpolled
mode) or to select the
PAFn sector , (in direct mode).
WRADD
Write Address Bus
LVTTL
For the 16Q device the WRADD bus is 7 bits. The WRADD bus is a dual purpose address bus. The first
[6:0]
INPUT
functionofWRADDistoselectaqueuetobewrittento.Theleastsignificant4bitsofthebus,WRADD[3:0]
are used to address 1 of 16 possible queues within a multi-queue device. The most significant 3 bits,
WRADD[6:4] are used to select 1 of 8 possible multi-queue devices that may be connected in expansion
mode.These3MSb’swilladdressadevicewiththematchingIDcode.Theaddresspresent ontheWRADD
bus will be selected on a rising edge of WCLK provided that WADEN is HIGH, (note, that data present on
the Din bus can be written into the previously selected queue on this WCLK edge and on the next rising
WCLK also, providing that
WENisLOW).TwoWCLKrisingedgesafterwritequeueselect,datacanbe
written into the newly selected queue.
The second function of the WRADD bus is to select the sector of queues to be loaded on to the
PAFnbus
during strobed flag mode. The least significant bit, WRADD[0] is used to select the sector of a device to be
placed on the
PAFnbus.Themostsignificant3bits,WRADD[6:4]areagainusedtoselect1of8possible
multi-queue devices that may be connected in expansion mode. Address bits WRADD[3:1] are don’t
careduringsectorselection.ThesectoraddresspresentontheWRADDbuswillbeselected ontherising
edge of WCLK provided that FSTR is HIGH, (note, that data can be written into the previously selected
queue on this WCLK edge). Please refer to Table 1 for details on the WRADD bus.
VCC
+3.3V Supply
Power
These are VCC power supply pins and must all be connected to a +3.3V supply rail.
GND
Ground Pin
Ground
These are Ground pins and must all be connected to the GND supply rail.
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