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参数资料
| 型号： | IDT72V73263BB |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 32/36页 |
| 文件大小： | 0K |
| 描述： | IC DGTL SW 16384X16384 208-BGA |
| 标准包装： | 12 |
| 系列： | 72V |
| 类型： | 多路复用器 |
| 电路： | 8 x 1:1 |
| 电压电源： | 单电源 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 208-BGA |
| 供应商设备封装： | 208-PBGA（17x17） |
| 包装： | 托盘 |
| 其它名称： | 72V73263BB |
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5
INDUSTRIAL TEMPERATURERANGE
IDT72V73263 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH WITH RATE MATCHING 16,384 x 16,384 CHANNELS
DESCRIPTION (CONTINUED):
The IDT72V73263 is capable of switching up to 16,384 x 16,384 channels
without blocking. Designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data, the
devicemaintainsframeintegrityindataapplicationsandminimizesthroughput
delay for voice applications on a per-channel basis.
The 64 serial input streams (RX) of the IDT72V73263 can be run at
2.048Mb/s, 4.096Mb/s, 8.192Mb/s, 16.384Mb/s or 32.768Mb/s allowing 32,
64, 128, 256 or 512 channels per 125
s frame. The data rates on the output
streamscanindependentlybeprogrammedtorunatanyofthesedatarates.
Withtwomainoperatingmodes,ProcessorModeandConnectionMode,the
IDT72V73263 can easily switch data from incoming serial streams (Data
Memory) or from the controlling microprocessor via Connection Memory.
Ascontrolandstatusinformationiscriticalindatatransmission,theProcessor
Modeisespeciallyusefulwhentherearemultipledevicessharingtheinputand
outputstreams.
With data coming from multiple sources and through different paths, data
enteringthedeviceisoftendelayed.Tohandlethisproblem,theIDT72V73263
hasaFrameOffset featuretoallowindividualstreamstobeoffsetfromtheframe
pulse in half clock-cycle intervals up to +7.5 clock cycles.
The IDT72V73263 also provides a JTAG test access port, memory block
programming, Group Block Programming, RX/TX internal bypass, a simple
microprocessor interface and automatic ST-BUS /GCI sensing to shorten
setup time, aid in debugging and ease use of the device without sacrificing
capabilities.
FUNCTIONALDESCRIPTION
DATAANDCONNECTIONMEMORY
All data that comes in through the RX inputs go through a serial-to-parallel
conversionbeforebeingstoredintointernalDataMemory.The8 KHzframe
pulse (F32i) is used to mark the 125
sframeboundariesandtosequentially
address the input channels in Data Memory.
DataoutputontheTXstreamsmaycomefromeithertheserialinputstreams
(Data Memory) or from the Connection Memory via the microprocessor or in
thecasethatRXinputdataistobeoutput,theaddressesinConnectionMemory
areusedtospecifyastreamandchanneloftheinput.TheConnectionMemory
issetupinsuchawaythateachlocationcorrespondstoanoutputchannelfor
eachparticularstream.Inthatway,morethanonechannelcanoutputthesame
data. In Processor Mode, the microprocessor writes data to the Connection
Memorylocationscorrespondingtothestreamandchannelthatistobeoutput.
Thelowerhalf(8leastsignificantbits)oftheConnectionMemoryLOW isoutput
everyframeuntilthemicroprocessorchangesthedataormodeofthechannels.
ByusingthisProcessorModecapability,themicroprocessorcanaccessinput
andoutputtime-slotsonaper-channelbasis.
ThethreeleastsignificantbitsoftheConnectionMemoryHIGHareusedto
controlper-channelmodeoftheoutputstreams.TheMOD2-0bitsareusedto
selectProcessorMode,ConstantorVariableDelayMode,BitErrorRate,and
theHigh-Impedancestateofoutputdrivers.IftheMOD2-0bitsaresetto1-1-1
accordingly, only that particular output channel (8 bits) will be in the High-
Impedancestate. IftheMOD2-0bitsaresetto1-0-0accordingly,thatparticular
channelwillbeinProcessorMode. IftheMOD2-0bitsaresetto1-0-1aBitError
RateTest patternwillbetransmittedforthattimeslot. SeeBERTsection. Ifthe
MOD2-0 bits are set to 0-0-1 accordingly, that particular channel will be in
ConstantDelayMode.Finally,iftheMOD2-0bitsaresetto0-0-0,thatparticular
channel will be in Variable Delay Mode.
SERIAL DATA INTERFACE TIMING
The master clock frequency of the IDT72V73263 is 32.768MHz, C32i. For
32.768Mb/s data rates, this results in a single-bit per clock. For 16.384Mb/s,
8.192Mb/s, 4.096Mb/s, and 2.048Mb/s this will result in two, four, eight, and
sixteenclocksperbit,respectively. TheIDT72V73263providestwodifferent
interface timing modes, ST-BUS or GCI. The IDT72V73263 automatically
detectsthepolarityofaninputframepulseandidentifiesitaseitherST-BUS
or GCI.
For32.768Mb/s,inST-BUSMode,dataisclockedoutonafallingedgeand
is clocked in on the subsequent rising-edge. For 16.384Mb/s, 8.192Mb/s,
4.096Mb/s, and 2.048Mb/s however there is not the typical associated clock
sincetheIDT72V73263acceptsonlya32.768MHzclock. Asaresulttherewill
be 2, 4, 8, and 16 clock between the 32.768Mb/s transmit edge and the
subsequentlytransmitedges. Althoughinthisisthecase,theIDT72V73263
willappropriatelytransmitandsampleontheproperedgeasiftherespective
clock were present. See ST-BUS Timing for detail.
For 32.768Mb/s, in GCI Mode, data is clocked out on a rising edge and is
clocked in on the subsequent falling-edge. For 16.384Mb/s, 8.192Mb/s,
4.096Mb/s,and2.048Mb/showever,againthereisnotthetypicalassociated
clocksincetheIDT72V73263acceptsonlya32.768MHzclock. Asaresultthere
will2,4,8,and16clocksbetweenthe32.768Mb/stransmitedgeandtheother
transmitedges. Althoughthisisthecase,theIDT72V73263willappropriately
transmitandsampleontheproperedgeasiftherespectiveclockwerepresent.
See GCI Bus Timing for detail.
DELAY THROUGH THE IDT72V73263
Theswitchingofinformationfromtheinputserialstreamstotheoutputserial
streams results in a throughput delay. The device can be programmed to
performtime-slotinterchangefunctionswithdifferentthroughputdelaycapabilities
onaper-channelbasis.Forvoiceapplications,variablethroughputdelayisbest
asitensureminimumdelaybetweeninputandoutputdata.Inwidebanddata
applications, constant throughput delay is best as the frame integrity of the
informationismaintainedthroughtheswitch.
Thedelaythroughthedevicevariesaccordingtothetypeofthroughputdelay
selectedintheMODbitsoftheConnectionMemory.
VARIABLE DELAY MODE (MOD2-0 = 0-0-0)
Inthismode,mostlyforvoiceapplicationswhereminimumthroughputdelay
is desired, delay is dependent on the combination of source and destination
channels.Theminimumdelayachievableisa3channelperiodsoftheslower
datarate.
CONSTANT DELAY MODE (MOD2-0 = 0-0-1)
Inthismode,frameintegrityismaintainedinallswitchingconfigurationsby
makinguseofamultipledatamemorybuffer.Inputchanneldataiswritteninto
the data memory buffers during frame n will be read out during frame n+2. In
theIDT72V73263,theminimumthroughputdelayachievableinConstantDelay
mode will be one frame plus one channel. See Table 14.
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| IDT72V73273BB | 功能描述:IC DGTL SW 32768X32768 208-BGA RoHS:否 类别:集成电路 (IC) >> 逻辑 - 信号开关，多路复用器，解码器 系列:72V 标准包装:48 系列:74VHC 类型:多路复用器 电路:4 x 2:1 独立电路:1 输出电流高，低:8mA，8mA 电压电源:单电源 电源电压:2 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:管件 |
| IDT72V73273BBG | 功能描述:IC DGTL SW 32768X32768 208-BGA RoHS:是 类别:集成电路 (IC) >> 逻辑 - 信号开关，多路复用器，解码器 系列:72V 标准包装:48 系列:74VHC 类型:多路复用器 电路:4 x 2:1 独立电路:1 输出电流高，低:8mA，8mA 电压电源:单电源 电源电压:2 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:管件 |
| IDT72V801L10PF | 功能描述:IC SYNC FIFO 256X9 10NS 64QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V801L10PF8 | 功能描述:IC SYNC FIFO 256X9 10NS 64QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
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