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参数资料
| 型号： | IDT74LVC16841APF8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVC/LCX/Z SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封装： | TVSOP-56 |
| 文件页数： | 1/6页 |
| 文件大小： | 65K |
| 代理商： | IDT74LVC16841APF8 |
INDUSTRIALTEMPERATURERANGE
IDT74LVC16841A
3.3V CMOS LOW VOLTAGE 20-BIT TRANSPARENT LATCH
1
AUGUST 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4602/1
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
IDT74LVC16841A
DESCRIPTION:
The LVC16841A low voltage 20-bit transparent latch is built using
advanced dual metal CMOS technology. This high speed, low power latch
is ideal for temporary storage of data. The LVC16841A can be used for
implementingmemoryaddresslatchs,I/Oports,andbusdrivers.Theoutput
enable (OE) and latch enable (LE) controls are organized to operate each
device as two 10-bit latches or one 20-bit latch. Flow through organization
of signal pins simplifies layout. All inputs are designed with hysteresis for
improved noise margin.
The LVC16841A is ideally suited for driving high capacitance loads and
low-impedance backplanes. The output buffers are designed with power off
disable capability to allow “live insertion” of boards when used as a
backplane drivers.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVC16841A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
3.3V CMOS LOW VOLTAGE
20-BIT TRANSPARENT LATCH
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O
1
OE
D
C
1
LE
1
D1
1
Q1
TO NINE OTHER CHANNELS
2
OE
D
C
2
LE
2
D1
2
Q1
1
56
55
28
29
42
2
15
TO NINE OTHER CHANNELS
相关PDF资料 |
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