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参数资料
| 型号： | IDT74LVC16952APA8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVC/LCX/Z SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封装： | 0.50 MM PITCH, TSSOP-56 |
| 文件页数： | 2/6页 |
| 文件大小： | 127K |
| 代理商： | IDT74LVC16952APA8 |
2
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74LVC16952A
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
1998 Integrated Device Technology, Inc.
DSC-123456
c
PIN CONFIGURATION
SSOP/ TSSOP/ TVSOP
TOP VIEW
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output
Capacitance
VOUT = 0V
6.5
8
pF
CI/O
I/O Port
Capacitance
VIN = 0V
6.5
8
pF
LVC Link
NOTE:
1. As applicable to the device type.
GND
1
A 1
VCC
GND
VCC
CEAB
2
C LKAB
SO56-1
SO56-2
SO56-3
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
GND
VCC
GND
VCC
GND
25
26
27
28
32
31
30
29
OEAB
CLK AB
CEAB
1
A 2
1
A 3
1
A 4
1
A 5
1
A 6
1
A 7
1
A 8
2
A 1
2
A 2
2
A 3
2
A 4
2
A 5
2
A 6
2
A 7
2
A 8
OEAB
CEBA
C LKBA
OEBA
C LKBA
CEBA
1
B 1
1
B 2
1
B 3
1
B 4
1
B 5
1
B 6
1
B 7
1
B 8
2
B 1
2
B 2
2
B 3
2
B 4
2
B 5
2
B 6
2
B 7
2
B 8
1
2
PIN DESCRIPTION
Pin Names
Description
x
OEAB
A-to-B Output Enable Inputs (Active LOW)
x
OEBA
B-to-A Output Enable Inputs (Active LOW)
x
CEAB
A-to-B Clock Enable Inputs (Active LOW)
x
CEBA
B-to-A Clock Enable Inputs (Active LOW)
xCLKAB
A-to-B Clock Inputs
xCLKBA
B-to-A Clock Inputs
xAx
A-to-B Data Inputs or B-to-A 3-State Outputs
xBx
B-to-A Data Inputs or A-to-B 3-State Outputs
FUNCTION TABLE (1, 3)
Inputs
Outputs
xCEAB
xCLKAB
xOEAB
xAx
xBx
HX
L
X
B
0
(2)
XL
L
X
B
0
(2)
L
↑
LL
L
↑
LH
H
XX
H
X
Z
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
↑ = LOW-to-HIGH Transition
2. Output level of B before the indicated steady-state input conditions
were established
3. A-to-B data flow is shown; B-toA data flow is similar but uses, x
CEBA,
xCLKBA, and x
OEBA.
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
Description
Max.
Unit
VTERM
Terminal Voltage with Respect to GND
– 0.5 to +6.5
V
TSTG
Storage Temperature
– 65 to +150
°C
IOUT
DC Output Current
– 50 to +50
mA
IIK
IOK
Continuous Clamp Current,
VI < 0 or VO < 0
– 50
mA
ICC
ISS
Continuous Current through
each VCC or GND
±100
mA
LVC Link
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device.
This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied.
Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
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