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参数资料
| 型号： | IDT74LVCH16260APF8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVC/LCX/Z SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| 封装： | 0.40 MM PITCH, TVSOP-56 |
| 文件页数： | 3/7页 |
| 文件大小： | 69K |
| 代理商： | IDT74LVCH16260APF8 |
INDUSTRIALTEMPERATURERANGE
IDT74LVCH16260A
3.3V CMOS 12-BIT TRI-PORT BUS EXCHANGER WITH 5V TOLERANT I/O
3
Inputs
Outputs
Ax
LEA1B
LEA2B OE1B OE2B
1Bx
2Bx
HH
H
L
H
LHH
L
HH
L
H
B(2)
LH
L
B(2)
HL
H
L
B(2)
H
LL
H
L
B(2)
L
XL
L
B(2)
XX
X
H
Z
X
L
H
Active
Z
X
H
L
Z
Active
X
L
Active
FUNCTION TABLES(1)
Inputs
Outputs
1Bx
2Bx
SEL
LE1B
LE2B
OEA
Ax
HX
H
X
L
H
LX
H
X
L
XX
H
L
X
L
A(2)
XH
L
X
H
L
H
XL
L
X
H
L
XX
L
X
L
A(2)
XX
X
H
Z
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
2. A, B = Output level before the indicated steady-state input conditions were
established.
PIN DESCRIPTION
Signal
I/O
Description
A(1:12)
I/O
Bidirectional Data Port A. Usually connected to the CPU’s Address/Data bus.(1)
1B(1:12)
I/O
Bidirectional Data Port 1B. Connected to the even path or even bank of memory.(1)
2B(1:12)
I/O
Bidirectional Data Port 2B. Connected to the odd path or odd bank of memory.(1)
LEA1B
I
Latch Enable Input for A-1B Latch. The Latch is open when LEA1B is HIGH. Data from the A-port is latched on the HIGH to
LOW transition of LEA1B.
LEA2B
I
Latch Enable Input for A-2B Latch. The Latch is open when LEA2B is HIGH. Data from the A-port is latched on the HIGH to LOW transition of
LEA2B.
LE1B
I
Latch Enable Input for 1B-A Latch. The Latch is open when LE1B is HIGH. Data from the 1B port is latched on the HIGH to LOW transition of
LE1B.
LE2B
I
Latch Enable Input for 2B-A Latch. The Latch is open when LE2B is HIGH. Data from the 2B port is latched on the HIGH to LOW transition of
LE2B.
SEL
I
1B or 2B Path Selection. When HIGH, SEL enables data transfer from 1B Port to A Port. When LOW, SEL enables data transfer from 2B Port
to A Port.
OEA
I
Output Enable for A Port (Active LOW).
OE1B
I
Output Enable for 1B Port (Active LOW).
OE2B
I
Output Enable for 2B Port (Active LOW).
NOTE:
1. These pins have “Bus-hold”. All other pins are standard inputs, outputs, or I/Os.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT74LVCH16260PA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74LVCH16373APAG | 功能描述:IC TRANSP LATCH 16BIT D 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 锁销 系列:74LVCH 标准包装:48 系列:74VHCT 逻辑类型:D 型，可寻址 电路:1:8 输出类型:标准 电源电压:4.5 V ~ 5.5 V 独立电路:1 延迟时间 - 传输:6ns 输出电流高，低:8mA，8mA 工作温度:-55°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:管件 |
| IDT74LVCH16373APAG8 | 功能描述:IC TRANSP LATCH 16BIT D 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 锁销 系列:74LVCH 标准包装:48 系列:74VHCT 逻辑类型:D 型，可寻址 电路:1:8 输出类型:标准 电源电压:4.5 V ~ 5.5 V 独立电路:1 延迟时间 - 传输:6ns 输出电流高，低:8mA，8mA 工作温度:-55°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:管件 |
| IDT74LVCH16374APAG | 功能描述:IC FLIP FLOP 16BIT D 3ST 48TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 触发器 系列:74LVCH 标准包装:1 系列:74AC 功能:设置（预设）和复位 类型:D 型 输出类型:差分 元件数:2 每个元件的位元数:1 频率 - 时钟:160MHz 延迟时间 - 传输:6ns 触发器类型:正边沿 输出电流高，低:24mA，24mA 电源电压:2 V ~ 6 V 工作温度:-55°C ~ 125°C 安装类型:表面贴装 封装/外壳:14-SOIC（0.154"，3.90mm 宽） 包装:Digi-Reel® 产品目录页面:928 (CN2011-ZH PDF) 其它名称:296-18123-6 |
| IDT74LVCH16374APAG8 | 功能描述:IC FLIP FLOP 16BIT D 3ST 48TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 触发器 系列:74LVCH 标准包装:1 系列:74LVX 功能:主复位 类型:D 型总线 输出类型:非反相 元件数:1 每个元件的位元数:8 频率 - 时钟:150MHz 延迟时间 - 传输:7.1ns 触发器类型:正边沿 输出电流高，低:4mA，4mA 电源电压:2 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 包装:Digi-Reel® 其它名称:74LVX273MTCXDKR |
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