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参数资料
| 型号： | IF280C52TXXX-25 |
| 厂商： | TEMIC SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP44 |
| 文件页数： | 7/32页 |
| 文件大小： | 3152K |
| 代理商： | IF280C52TXXX-25 |
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14
7707F–AVR–11/10
AT90USB82/162
There are basically two types of interrupts. The first type is triggered by an event that sets the
Interrupt Flag. For these interrupts, the Program Counter is vectored to the actual Interrupt Vec-
tor in order to execute the interrupt handling routine, and hardware clears the corresponding
Interrupt Flag. Interrupt Flags can also be cleared by writing a logic one to the flag bit position(s)
to be cleared. If an interrupt condition occurs while the corresponding interrupt enable bit is
cleared, the Interrupt Flag will be set and remembered until the interrupt is enabled, or the flag is
cleared by software. Similarly, if one or more interrupt conditions occur while the Global Interrupt
Enable bit is cleared, the corresponding Interrupt Flag(s) will be set and remembered until the
Global Interrupt Enable bit is set, and will then be executed by order of priority.
The second type of interrupts will trigger as long as the interrupt condition is present. These
interrupts do not necessarily have Interrupt Flags. If the interrupt condition disappears before the
interrupt is enabled, the interrupt will not be triggered.
When the AVR exits from an interrupt, it will always return to the main program and execute one
more instruction before any pending interrupt is served.
Note that the Status Register is not automatically stored when entering an interrupt routine, nor
restored when returning from an interrupt routine. This must be handled by software.
When using the CLI instruction to disable interrupts, the interrupts will be immediately disabled.
No interrupt will be executed after the CLI instruction, even if it occurs simultaneously with the
CLI instruction. The following example shows how this can be used to avoid interrupts during the
timed EEPROM write sequence..
When using the SEI instruction to enable interrupts, the instruction following SEI will be exe-
cuted before any pending interrupts, as shown in this example.
Assembly Code Example
in
r16, SREG
; store SREG value
cli
; disable interrupts during timed sequence
sbi
EECR, EEMPE
; start EEPROM write
sbi
EECR, EEPE
out
SREG, r16
; restore SREG value (I-bit)
C Code Example
char
cSREG;
cSREG = SREG; /* store SREG value */
/* disable interrupts during timed sequence */
__disable_interrupt();
EECR |= (1<<EEMPE); /* start EEPROM write */
EECR |= (1<<EEPE);
SREG = cSREG; /* restore SREG value (I-bit) */
相关PDF资料 |
PDF描述 |
|---|---|
| IF280C52XXX-L16SHXXX | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP44 |
| IQ80C52CXXX-20SHXXX:D | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44 |
| IQ80C52EXXX-30SHXXX | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44 |
| IQ80C52XXX-30SHXXX:D | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44 |
| IQ80C52XXX-36SHXXX:R | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IF283C151C-12 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| IF283C151C-16 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| IF283C151C-20 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| IF283C151C-25 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| IF283C151C-30 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
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