参数资料
型号: IMISC680EYB
元件分类: 时钟及定时
英文描述: LOW SKEW CLOCK DRIVER, PDSO48
封装: SSOP-48
文件页数: 4/8页
文件大小: 94K
代理商: IMISC680EYB
SC680E
I
2C System Clock Buffer
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev.1.7
2/17/2000
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571
Page 4 of 8
Serial Control Registers (Cont.)
Byte 0: Function Select Register(1 = enable, 0 = Stopped)
Bit
@Pup
Pin#
Description
7
1
18
CLK8 (Active = 1, Forced low = 0)
6
1
17
CLK7 (Active = 1, Forced low = 0)
5
1
14
CLK6 (Active = 1, Forced low = 0)
4
1
13
CLK5 (Active = 1, Forced low = 0)
3
1
9
CLK4 (Active = 1, Forced low = 0)
2
1
8
CLK3 (Active = 1, Forced low = 0)
1
5
CLK2 (Active = 1, Forced low = 0)
0
1
4
CLK1 (Active = 1, Forced low = 0)
Byte 1: Clock Register (1 = enable, 0 = Stopped)
Bit
@Pup
Pin#
Description
7
1
45
CLK18 (Active = 1, Forced low = 0)
6
1
44
CLK17(Active = 1, Forced low = 0)
5
1
41
CLK16 (Active = 1, Forced low = 0)
4
1
40
CLK15 (Active = 1, Forced low = 0)
3
1
36
CLK14 (Active = 1, Forced low = 0)
2
1
35
CLK13(Active = 1, Forced low = 0)
1
32
CLK12 (Active = 1, Forced low = 0)
0
1
31
CLK11 (Active = 1, Forced low = 0)
Byte 2: Clock Register ( 1 = enable, 0 = Stopped )
Bit
@Pup
Pin#
Description
7
1
28
CLK10 (Active = 1, Forced low = 0)
6
1
21
CLK9 (Active = 1, Forced low = 0)
5
0
-
Not Used
4
0
-
Not Used
3
0
-
Not Used
2
0
-
Not Used
1
-
Not Used
0
1
-
Not Used
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