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参数资料
| 型号： | IMISG577CYB |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | SSOP-48 |
| 文件页数： | 10/10页 |
| 文件大小： | 166K |
| 代理商： | IMISG577CYB |
SG577C
Low EMI Clock Generator for Pentium II Systems with Power
Management
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev 2.0
8/12/98
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571
Page 9 of 10
PCB LAYOUT SUGGESTION
Via to VDD Plane
Via to GND Plane
Void (cut) in power plane
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VCC
VCC (CPU)
C1
FB2
FB1
22uF
C11
C10
C9
C8
C7
C6
C3
C4
C5
This is only a layout recommendation for best performance and lower EMI. the designer may choose a different
approach but C2, C3, C4, C5, C6, C7, C8, C9, and C10 (all are 0.1 uf) should always be used and placed as close to
their VDD pins as is physically possible. The topological hookup of C4 with respect to its power and ground vias is
especially important.
C2
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